Abstract
Discrete wavelet transform (DWT) is a filter where discrete samples are operated on to capture both spatial and frequency components of the input signal into the filter output. It is widely used tool in image processing for applications such as image compression. There are numerous wavelet transform most popularly the Haar transform, Daubechies transform, dual tree complex transform, etc. Its implementation involves multiplication operation that requires high hardware complexity. These wavelet transforms can also be implemented using a technique called distributed arithmetic (DA) which saves resource by using multiply and accumulate accelerators. But the generic DA architecture consumes large LUTs, to eliminate this disadvantage, this paper proposes a resource efficient and fast alternative architecture designed using Xilinx Vivado for implementation of Daubechies low pass filter on FPGA.
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Sowmya, K.B., Jamakhandi, D., Alex Mathew, J. (2021). Proficient Discrete Wavelet Transform Using Distributed Arithmetic Architecture on FPGA. In: Nath, V., Mandal, J. (eds) Nanoelectronics, Circuits and Communication Systems. Lecture Notes in Electrical Engineering, vol 692. Springer, Singapore. https://doi.org/10.1007/978-981-15-7486-3_49
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DOI: https://doi.org/10.1007/978-981-15-7486-3_49
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