Abstract
This paper presents a 2–6-bit resolution selective flash ADC (RSA). A re-configurable or resolution selective flash ADC is designed for use with different applications. In this design, resolution for a particular application can be chosen without the need of replacing the ADC with another low or high resolution ADC. Speed, resolution, and power are inter-dependent; therefore, to maintain a good balance re-configurable ADCs are very much efficient. A resolution selective design gives user a choice for selecting the resolution according to the application and thus save the manufacturing cost. For full resolution of 6-bit the ADC consumes 1.57 mW and for the lowest resolution of 2-bit it consumes 268.9 µW for 1 V supply voltage.
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Acknowledgements
Authors would like to thank ECE department, NERIST, Arunachal Pradesh and EICT Academy, IIT Guwahati, Assam for their resource and assistance. We would also like to thank MeitY (under Govt. of India) for facilitating research grant under Visvesvaraya PhD Scheme.
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Hussain, S., Kumar, R., Trivedi, G. (2020). Resolution Selective 2–6-Bit Flash ADC in 45 nm Technology. In: Mallick, P.K., Meher, P., Majumder, A., Das, S.K. (eds) Electronic Systems and Intelligent Computing. Lecture Notes in Electrical Engineering, vol 686. Springer, Singapore. https://doi.org/10.1007/978-981-15-7031-5_45
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DOI: https://doi.org/10.1007/978-981-15-7031-5_45
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