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Design and Analysis of Approximate Multiplier for Image Processing Application

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Advances in Smart System Technologies

Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 1163))

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Abstract

Approximate computing is an emerging technology in digital circuits that improves the accuracy performance in error resilient application. Approximate compressors are the main key element, which is used for the design of approximate multiplier with the efficiency of power and area highly used for the image processing applications. The 4:2 approximate compressors are proposed to reduce the error which produces the output of exact 4:2 compressor. By using the improved compressor, two 4 × 4 multipliers are designed by three different stages of compressor with different accuracies which the errors are reduced by encoding its inputs using generate and propagate signals. The designed 4 × 4 multipliers are used as a building block for scaling up to 16 × 16 and 32 × 32 multipliers. The most accurate multiplier is identified by comparing the results of area, power, delay and power delay product (PDP) and analyzed by mean relative error distance (MRED). In image processing applications, the output image with higher quality and lower power consumption is achieved by the proposed effective multiplier.

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References

  1. Schlachter, J., Camus, V., Palem, K.V., Enz, C.: Design and applications of approximate circuits by gate-level pruning. IEEE Trans. Very Large Scale Integr. Syst. 25(5), 1694–1702 (2017)

    Article  Google Scholar 

  2. Narayanamoorthy, S., Moghaddam, H.A., Liu, Z., Park, T., Kim, N.S.: Energy- efficient approximate multiplication for digital signal processing and classification applications. IEEE Trans. Very Large Scale Integr. Syst. 23(6), 1180–1184 (2014)

    Article  Google Scholar 

  3. Zhong, H., Xu, W., Xie, N., Zhang, T.: Area-efficient min-sum decoder design for high-rate quasi-cyclic low-density parity-codes in magnetic recording. IEEE Trans. Magn. 43(12), 4117–4122 (2007)

    Article  Google Scholar 

  4. Venkataramani, S., Ranjan, A., Roy, K., Raghunathan, A.: AxNN: energy-efficient neuromorphic systems using approximate computing. In: International Symposium on Low Power Electronics and Design, pp. 27–32 (2014)

    Google Scholar 

  5. Roy, K., Raghunathan, A.: Approximate computing: an energy-efficient computing technique for error resilient applications. In: IEEE Computer Society Annual Symposium on VLSI, pp. 473–475 (2015)

    Google Scholar 

  6. Sanchez-Clemente, J., Entrena, L., Hrbacek, R., Sekanina, L.: Error mitigation using approximate logic circuits: a comparison of probabilistic and evolutionary approaches. IEEE Trans. Reliab. 65(4), 1871–1883 (2016)

    Article  Google Scholar 

  7. Lau, M.S.K., Ling, K.V., Chu, Y.C.: Energy-aware probabilistic multiplier: design and analysis. In: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, pp. 281–290 (2009)

    Google Scholar 

  8. Wang, Z., Bovik, A.C., Sheikh, H.R., Simoncelli, E.P.: Image quality assessment: from error visibility to structural similarity. IEEE Trans. Image Process. 13(4), 600–612 (2004)

    Article  Google Scholar 

  9. Liu, C., Han, J., Lombardi, F.: A low-power, high-performance approximate multiplier with configurable partial error recovery. Des., Autom. Test Eur. 2014(1), 1–4 (2014)

    Google Scholar 

  10. Jiang, H., Liu, C., Liu, L., Lombardi F., Han, J.: A review, classification and comparative evaluation of approximate arithmetic circuits. ACM J. Emer. Technol. Comput. Syst. 13(4) (2017). Article No. 60

    Google Scholar 

  11. Moons, B., Verhelst, M.: Energy-efficiency and accuracy of stochastic computing circuits in emerging technologies. IEEE J. Emerg. Sel. Top. Circ. Syst. 4(4), 475–486 (2014)

    Google Scholar 

  12. Lin, C.H., Lin, I.C.: High accuracy approximate multiplier with error correction. In: IEEE International Conference on Computer Design, pp. 33–38 (2013)

    Google Scholar 

  13. Han, J., Orshansky, M.: Approximate computing: an emerging paradigm for energy-efficient design. In: IEEE European Test Symposium, pp. 1–6 (2013)

    Google Scholar 

  14. Adde, P., Le Bidan, R.: A low-complexity soft-decision decoding architecture for the binary extended Golay code. In: IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp. 705–708 (2012)

    Google Scholar 

  15. Liu, C.: Design and analysis of approximate adders and multipliers. Master’s Thesis, University of Alberta, Canada (2014)

    Google Scholar 

  16. Shah, M.: Future of JPEG XT: privacy and security. Ph.D. Thesis, University of Texas Arlington, Texas, USA (2016)

    Google Scholar 

  17. Yang, J., Zhu, G., Shi, Y.Q.: Analyzing the effect of JPEG compression on local variance of image intensity. IEEE Trans. Image Process. 25(6), 2647–2656 (2016)

    Article  MathSciNet  Google Scholar 

  18. Mahdiani, H.R., Ahmadi, A., Fakhraie, S.M., Lucas, C.: Bio-inspired imprecise computational blocks for efficient VLSI implementation of soft-computing applications. IEEE Trans. Circ. Syst. I Regul. Pap. 57(4), 850–862 (2010)

    Article  MathSciNet  Google Scholar 

  19. Pham, C.C., Jeon, J.W.: Efficient image sharpening and denoising using adaptive guided image filtering. IET Image Proc. 9(1), 71–79 (2015)

    Article  Google Scholar 

  20. Babar, Z., Ng, S.X., Hanzo, L.: EXIT-chart-aided near-capacity quantum turbo code design. IEEE Trans. Veh. Technol. 64(3), 866–875 (2015)

    Article  Google Scholar 

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Authors and Affiliations

  1. VLSI Design, Sri Ramakrishna Engineering College, Coimbatore, India

    S. Sathiyapriya

  2. Department of Electronics and Communication Engineering, Sri Ramakrishna Engineering College, Coimbatore, India

    C. S. Manikandababu

Authors
  1. S. Sathiyapriya
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  2. C. S. Manikandababu
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Corresponding author

Correspondence to S. Sathiyapriya .

Editor information

Editors and Affiliations

  1. Vel Tech Rangarajan Dr. Sagunthala R&D Institute of Science and Technology, Chennai, Tamil Nadu, India

    P. Suresh

  2. Vel Tech Rangarajan Dr. Sagunthala R&D Institute of Science and Technology, Chennai, Tamil Nadu, India

    U. Saravanakumar

  3. Jordan University of Science and Technology, Irbid, Jordan

    Mohammed Saleh Hussein Al Salameh

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Sathiyapriya, S., Manikandababu, C.S. (2021). Design and Analysis of Approximate Multiplier for Image Processing Application. In: Suresh, P., Saravanakumar, U., Hussein Al Salameh, M. (eds) Advances in Smart System Technologies. Advances in Intelligent Systems and Computing, vol 1163. Springer, Singapore. https://doi.org/10.1007/978-981-15-5029-4_16

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