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Design and Analysis of Different Full Adder Cells Using New Technologies

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Innovations in Electrical and Electronic Engineering

Abstract

CMOS transistors are most widely used for the design of computerized circuits, when scaling down the nanometer technology these devices faces the short channel effects and causes I-V characteristics to depart from the traditional MOSFETs, so the researchers have developed the other transistors technologies like CNTFET and GNRFET. Carbon nanotube field-effect transistor is one of the optimistic technologies and it is a three-terminal transistor similar to MOSFET. The semiconducting channel between the two terminals called source and drain comprises of the nanotube which is made of carbon. Graphene nano-ribbon field-effect transistor is the most optimistic technology here the semiconducting channel is made of graphene. When contrasted with barrel-shaped CNTFETs, GNRFETs can be prepared in situ process, transfer-free, and silicon compatible, thus have no passage-related and alignment problems as faced in CNTFET devices. This paper presents different 1-bit Full Adder Cells(FACs) like TG MUX-based FAC (TGM), MN MUX-based FAC (MNM), proposed TG Modified MUX-based FAC (TGMM) and another proposed MN Modified MUX-based FAC (MNMM) are designed using different technologies like CNTFET and GNRFET at 16 nm technology with a supply voltage of 0.85 V and simulation is done by using Synopsys HSPICE tool and the proposed designs are best when compared to the TGM and MNM FACs in terms of Static and Dynamic powers Dissipations and Delay.

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References

  1. Maleknejad M, Mohammadi S, Mirhosseini SM, Navi K, Naji HR, Hosseinzadeh M (2018) A low-power high-speed hybrid multi-threshold full adder design in CNFET technology. Springer Science+Business Media, LLC, part of Springer Nature

    Google Scholar 

  2. Ghanatghestani MM, Ghavami B, Salehpour H (2017) A CNFET full adder cell design for high-speed arithmetic units. Turkish J Electr Eng Comput Sci 25:2399–2509

    Article  Google Scholar 

  3. Deng J, Wong HSP (2006) A circuit-compatible SPICE model for enhancement mode carbon nanotube field effect transistors. Int Conf Simul Semicond Process Devices, 166–169

    Google Scholar 

  4. Somineni RP, Sai YP, Leela SN (2015) Low leakage CNTFET full adders. In: IEEE 2015 global conference on communication technologies (GCCT), pp 174–179, 23–24 Apr 2015

    Google Scholar 

  5. Somineni RP, Jaweed SM (2017) Design of low power multiplier using CNTFET. In: 2017 IEEE 7th international advance computing conference (IACC-2017), Hyderabad, pp 556–559, 05–07 Jan 2017

    Google Scholar 

  6. Amini-Valashani M, Ayat M, Mirzakuchaki S (2018) Design and analysis of a novel low-power and energy-efficient 18T hybrid full adder. Microelectron J 74:49–59

    Article  Google Scholar 

  7. Stanford University CNFET Model. http://nano.stanford.edu/model.php?id=26

  8. Chen YY, Sangai A, Gholipour M, Chen D Graphene nano-ribbon field-effect transistors as future low-power devices. In: Symposium on low power electronics and design

    Google Scholar 

  9. Mishra M, Singh RS, Imran A (2017) Performance optimization of GNRFET Inverter at 32 nm technology node. ScienceDirect Mater Today Proc 4:10607–10611

    Google Scholar 

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Correspondence to Nandhaiahgari Dinesh Kumar .

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Dinesh Kumar, N., Rajendra Prasad, S., Raja Kumari, C., Dhanunjaya Naidu, C. (2021). Design and Analysis of Different Full Adder Cells Using New Technologies. In: Favorskaya, M.N., Mekhilef, S., Pandey, R.K., Singh, N. (eds) Innovations in Electrical and Electronic Engineering. Lecture Notes in Electrical Engineering, vol 661. Springer, Singapore. https://doi.org/10.1007/978-981-15-4692-1_45

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  • DOI: https://doi.org/10.1007/978-981-15-4692-1_45

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-15-4691-4

  • Online ISBN: 978-981-15-4692-1

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