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ECAM: An Efficient Cache Management Strategy for Address Mappings in Flash Translation Layer

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Advanced Parallel Processing Technologies (APPT 2013)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 8299))

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Abstract

Solid State Drives (SSDs) have been widely adopted in both enterprise and embedded storage systems with the great improvement in NAND flash memory technology. With the growing size of NAND flash memory, how to keep the most active address mappings be cached in limited on-flash SRAM is crucial to a Flash Translation Layer (FTL) scheme, that plays an important role in managing NAND flash. In this paper, we propose an efficient cache management strategy, called ECAM, to enhance the capability of caching page-level address mappings in demand-based Flash Translation Layer. In ECAM, we optimize the structure of Cached Mapping Table (CMT) to record multiple address mappings with consecutive logical page numbers and physical page numbers in just one mapping entry, and propose another two tables, Cached Split Table (CST) and Cached Translation Table (CTT). CST can cache the split mapping entries caused by the partial updates in CMT and CTT is used to reduce the overhead of address translation for large number of sequential requests. By the cooperation of CMT, CST and CTT, ECAM implements an efficient two-tier selective caching strategy to jointly exploit the temporal and spatial localities of workloads. The simulation on various realistic workloads shows that ECAM can improve the cache hit ratio and reduce the number of expensive extra read/write operations between SRAM and flash efficiently.

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References

  1. Agrawal, N., Prabhakaran, V., Wobber, T., Davis, J.D., Manasse, M., Panigrahy, R.: Design tradeoffs for ssd performance. In: USENIX 2008 Annual Technical Conference on Annual Technical Conference, pp. 57–70 (2008)

    Google Scholar 

  2. Ban, A.: Flash file system optimized for page-mode flash technologies (August 10, 1999), uS Patent 5,937,425

    Google Scholar 

  3. Chen, F., Koufaty, D.A., Zhang, X.: Understanding intrinsic characteristics and system implications of flash memory based solid state drives. In: Proceedings of the Eleventh International Joint Conference on Measurement and Modeling of Computer Systems, pp. 181–192. ACM (2009)

    Google Scholar 

  4. Chen, F., Luo, T., Zhang, X.: Caftl: A content-aware flash translation layer enhancing the lifespan of flash memory based solid state drives. In: Proceedings of the 9th USENIX Conference on File and Stroage Technologies, p. 6. USENIX Association (2011)

    Google Scholar 

  5. Chung, T.S., Park, D.J., Park, S., Lee, D.H., Lee, S.W., Song, H.J.: A survey of flash translation layer. Journal of Systems Architecture 55(5), 332–343 (2009)

    Article  Google Scholar 

  6. Estakhri, P., Iman, B.: Moving sequential sectors within a block of information in a flash memory mass storage architecture (July 27, 1999), uS Patent 5,930,815

    Google Scholar 

  7. Gupta, A., Kim, Y., Urgaonkar, B.: Dftl: A flash translation layer employing demand-based selective of page-level address mapping. In: Proc. of ASPLOS, vol. 9, pp. 7–11 (2009)

    Google Scholar 

  8. Gupta, A., Pisolkar, R., Urgaonkar, B., Sivasubramaniam, A.: Leveraging value locality in optimizing nand flash-based ssds. In: Proceedings of the 9th USENIX Conference on File and Stroage Technologies, p. 7. USENIX Association (2011)

    Google Scholar 

  9. Jiang, S., Zhang, L., Yuan, X., Hu, H., Chen, Y.: S-ftl: An efficient address translation for flash memory by exploiting spatial locality. In: 2011 IEEE 27th Symposium on Mass Storage Systems and Technologies (MSST), pp. 1–12. IEEE (2011)

    Google Scholar 

  10. Jung, D., Kang, J.U., Jo, H., Kim, J.S., Lee, J.: Superblock ftl: A superblock-based flash translation layer with a hybrid address translation scheme. ACM Transactions on Embedded Computing Systems (TECS) 9(4), 40 (2010)

    Article  Google Scholar 

  11. Karedla, R., Love, J.S., Wherry, B.G.: Caching strategies to improve disk system performance. Computer 27(3), 38–46 (1994)

    Article  Google Scholar 

  12. Bates, K., McNutt, B.: Websearch trace from umass trace traces. The Storage Performance Council (2002), http://traces.cs.umass.edu/index.php/Storage/Storage

  13. Kim, J., Kim, J.M., Noh, S.H., Min, S.L., Cho, Y.: A space-efficient flash translation layer for compactflash systems. IEEE Transactions on Consumer Electronics 48(2), 366–375 (2002)

    Article  Google Scholar 

  14. Lee, S.W., Park, D.J., Chung, T.S., Lee, D.H., Park, S., Song, H.J.: A log buffer-based flash translation layer using fully-associative sector translation. ACM Transactions on Embedded Computing Systems (TECS) 6(3), 18 (2007)

    Article  Google Scholar 

  15. Lee, S., Shin, D., Kim, Y.J., Kim, J.: Last: locality-aware sector translation for nand flash memory-based storage systems. ACM SIGOPS Operating Systems Review 42(6), 36–42 (2008)

    Article  Google Scholar 

  16. Lim, S.P., Lee, S.W., Moon, B.: Faster ftl for enterprise-class flash memory ssds. In: 2010 International Workshop on Storage Network Architecture and Parallel I/Os (SNAPI), pp. 3–12. IEEE (2010)

    Google Scholar 

  17. Narayanan, D., Donnelly, A., Rowstron, A.: Write off-loading: Practical power management for enterprise storage. ACM Transactions on Storage (TOS) 4(3), 10 (2008)

    Google Scholar 

  18. Russinovich, M.: Diskmon for windows v2.01 (2006), http://technet.microsoft.com/en-us/Sysinternals/Bb896646.aspx

  19. Wang, C., Wong, W.F.: Adapt: Efficient workload-sensitive flash management based on adaptation, prediction and aggregation. In: 2012 IEEE 28th Symposium on Mass Storage Systems and Technologies (MSST), pp. 1–12. IEEE (2012)

    Google Scholar 

  20. Wei, Q., Gong, B., Pathak, S., Veeravalli, B., Zeng, L., Okada, K.: Waftl: A workload adaptive flash translation layer with data partition. In: 2011 IEEE 27th Symposium on Mass Storage Systems and Technologies (MSST), pp. 1–12. IEEE (2011)

    Google Scholar 

  21. Xu, Z., Li, R., Xu, C.Z.: Cast: A page-level ftl with compact address mapping and parallel data blocks. In: 2012 IEEE 31st International Performance Computing and Communications Conference (IPCCC), pp. 142–151. IEEE (2012)

    Google Scholar 

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Author information

Authors and Affiliations

  1. School of Computer, National University of Defense Technology, Changsha, China, 410073

    Xuchao Xie, Qiong Li, Dengping Wei, Zhenlong Song & Liquan Xiao

Authors
  1. Xuchao Xie
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  2. Qiong Li
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  3. Dengping Wei
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  4. Zhenlong Song
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  5. Liquan Xiao
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Editor information

Editors and Affiliations

  1. Institute of Computing Technology, State Key Laboratory of Computer Architecture, Chinese Academy of Sciences, No. 6 Kexueyuan South road, Haifian District, 100190, Beijing, China

    Chenggang Wu

  2. Département d’Informatique, INRIA and École Normale Supérieure, 45 rue d’Ulm, 75005, Paris, France

    Albert Cohen

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Xie, X., Li, Q., Wei, D., Song, Z., Xiao, L. (2013). ECAM: An Efficient Cache Management Strategy for Address Mappings in Flash Translation Layer. In: Wu, C., Cohen, A. (eds) Advanced Parallel Processing Technologies. APPT 2013. Lecture Notes in Computer Science, vol 8299. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-45293-2_11

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  • DOI: https://doi.org/10.1007/978-3-642-45293-2_11

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-45292-5

  • Online ISBN: 978-3-642-45293-2

  • eBook Packages: Computer ScienceComputer Science (R0)

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