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DISBench: Benchmark for Memory Performance Evaluation of Multicore Multiprocessors

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Parallel Computing Technologies (PaCT 2013)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 7979))

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Abstract

In this paper we present DISBench, an open-source benchmark suite designed for memory performance evaluation of multicore processors and multiprocessor systems on different sets of workload. DISBench includes three memory access kernels: stream, stride and random, which represent different types of memory intensive applications. DISBench natively supports hardware performance counters for detailed performance analysis. Evaluation results of the modern multicore processors (Intel Sandy Bridge-EP and AMD Interlagos) are presented and discussed.

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References

  1. McCalpin, J.D.: Stream: Sustainable memory bandwidth in high performance computers. University of Virginia, Tech. Rep. (1991-2007), http://www.cs.virginia.edu/stream/

  2. McCalpin, J.D.: Memory bandwidth and machine balance in current high performance computers. IEEE Computer Sociaty Technical Committee on Computer Architecture (TCCA), Newsletter, pp. 19–25 (December 1995)

    Google Scholar 

  3. Dongarra, J.J., Luszczek, P.: Introduction to the HPC Challenge Benchmark Suite

    Google Scholar 

  4. McVoy, L.W., Staelin, C.: lmbench: Portable Tools for Performance Analysis. In: USENIX Annual Technical Conference, pp. 279–294 (1996)

    Google Scholar 

  5. Molka, D., Hackenberg, D., Schöne, R., Müller, M.S.: Memory Performance and Cache Coherency Effects on an Intel Nehalem Multiprocessor System. In: Proceedings of the 18th International Conference on Parallel Architectures and Compilation Techniques, PACT 2009, pp. 261–270. IEEE (2009)

    Google Scholar 

  6. Hackenberg, D., Molka, D., Nagel, W.E.: Comparing Cache Architectures and Coherency Protocols on x86-64 Multicore SMP Systems. In: Proceedings of the 42nd International Symposium on Microarchitecture, MICRO 2009, pp. 413–422. ACM (2009)

    Google Scholar 

  7. London, K., Moore, S., Mucci, P., Seymour, K., Luczak, R.: The PAPI Cross-Platform Interface to Hardware Performance Counters. Department of Defense Users’ Group Conference Proceedings, Biloxi, Mississippi, June 18-21 (2001)

    Google Scholar 

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Frolov, A., Gilmendinov, M. (2013). DISBench: Benchmark for Memory Performance Evaluation of Multicore Multiprocessors. In: Malyshkin, V. (eds) Parallel Computing Technologies. PaCT 2013. Lecture Notes in Computer Science, vol 7979. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-39958-9_17

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  • DOI: https://doi.org/10.1007/978-3-642-39958-9_17

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-39957-2

  • Online ISBN: 978-3-642-39958-9

  • eBook Packages: Computer ScienceComputer Science (R0)

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