Abstract
This chapter presents a novel circuit synthesis flow based on concept comparison, combination, learning, and re-use. The discussion overviews a technique for systematically comparing two analog circuits. The comparison data presents the similar and distinguishing performance characteristics of two circuits with respect to DC-gain, bandwidth, common-mode rejection ratio (CMRR), noise, and sensitivity. The comparison data is important for getting insight about the common and unique benefits of a circuit, selecting fitting circuit topologies for system design, and circuit topology refinement and synthesis. The technique matches the topologies and nodal symbolic expressions of the compared circuits to find nodes with similar electric behavior. The impact on performance of the unmatched nodes is used to express the differentiating characteristics of the circuits. Experiments illustrate the comparison technique for a pair of analog circuits.
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References
Antao, B., Brodersen, A.: ARCHGEN: automated synthesis of analog systems. IEEE Transactions on VLSI Systems 3(2), 231–244 (1995)
Castro-Lopez, R., Fernandez, F., Guerra-Vinuesa, O., Rodriguez-Vazquez, A.: Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits. Kluwer (2006)
Chang, H., Charbon, E., et al.: A Top-Down Constraint Driven Design Methodology for Analog Integrated Circuits. Kluwer (1996)
Das, A., Vemuri, R.: Topology Synthesis of Analog Circuits based on Adaptively Generated Building Blocks. In: Proceedings of Design Automation Conference, pp. 44–49 (2008)
Degrauwe, M., Nys, O., Dijkstra, E., Rijmenants, J., Bitz, S., Goffart, B., Vittoz, E., Cserveny, S., Meixenberger, C., Van Der Stappen, G., Oguey, H.: IDAC: An Interactive Design Tool for Analog CMOS Circuits. IEEE Journal of Solid-State Circuits SC 22(6), 1106–1116 (1987)
De Smedt, B., Gielen, G.: WATSON: Design Space Boundary Exploration and Model Generation for Analog and RF IC Design. IEEE Transactions on CAD of Integrated Circuits and Systems 22(2), 213–224 (2003)
Doboli, A., Vemuri, R.: Exploration-Based High-Level Synthesis of Linear Analog Systems Operating at Low/Medium Frequencies. IEEE Transactions on CAD of Integrated Circuits and Systems 22(11), 1556–1568 (2003)
Doboli, A., Dhanwada, N., Nunez, A., Vemuri, R.: A Library-Based Approach to Synthesis of Analog Systems from VHDL-AMS Specifications. ACM Transactions on Design Automation 9(2), 238–271 (2004)
El-Turky, F., Perry, E.: BLADES: An Artificial Intelligence Approach to Analog Circuit Design. IEEE Transactions on CAD of Integrated Circuits and Systems 8(6), 680–692 (1989)
Ferent, C., Doboli, A.: A Symbolic Technique for Automated Characterization of the Uniqueness and Similarity of Analog Circuit Design Features. In: Proceedings of Design, Automation and Test in Europe Conference (2011)
Harjani, R., Rutenbar, R., Carley, L.: OASYS: a framework for analog circuit synthesis. IEEE Transactions on CAD of Integrated Circuits and Systems 8(12), 1247–1266 (1989)
Hassoun, S., McCreary, C.: Regularity Extraction via Clan-based Structural Circuit Decomposition. In: Proceedings of ICCAD, pp. 414–419 (1999)
Horta, N., Franca, J.: Algorithm-driven synthesis of data conversion architectures. IEEE Transactions on CAD of Integrated Circuits and Systems 16(10), 1116–1135 (1997)
Hum, R.: Where are the dragons? Presentation at Frontiers in Analog Circuit Synthesis and Verification Workshop (2011)
Koh, H., Sequin, C., Gray, P.: OPASYN: a compiler for CMOS operational amplifiers. IEEE Transactions on CAD of Integrated Circuits and Systems 9(2), 113–125 (1990)
Li, X., Wang, J., Pileggi, L., Chen, T.-S., Chiang, W.: Performance-Centering Optimization for System-Level Analog Design Exploration. In: Proceedings Design Automation Conference, pp. 422–429 (2005)
McConaghy, T., Palmers, P., Steyaert, M., Gielen, G.: Variation-Aware Structural Synthesis of Analog Circuits via Hierarchical Building Blocks and Structural Homotopy. IEEE Transactions on CAD of Integrated Circuits and Systems 28(9), 1281–1294 (2009)
Martens, E., Gielen, G.: Classification of Analog Synthesis Tools based on their Architecture Selection Mechanisms. Integration, the VLSI Journal 41, 238–252 (2008)
Ramirez-Angulo, J., Carvajal, R., Galan, J., Lopez-Martin, A.: A Free But Efficient Low-Voltage Class-AB Two-Stage Operational Amplifier. IEEE Transactions on Circuits & Systems - II 53, 568–571 (2006)
Ramos, J., Steyaert, M.: Positive Feedback Frequency Compensation for Low-Voltage Low-Power Three-Stage Amplifier. IEEE Transactions on Circuits & Systems - II 51, 1967–1974 (2004)
Rao, D., Kurdahi, F.: On Clustering for Maximal Regularity Extraction. IEEE Transactions on CAD of Integrated Circuits and Systems 12(8), 1198–1208 (1993)
Sripramong, T., Toumazou, C.: The Invention of CMOS Amplifiers Using Genetic Programming and Current-Flow Analysis. IEEE Transactions on CAD of Integrated Circuits and Systems 21(11), 1237–1252 (2002)
Stehr, G., Graeb, H., Antreich, K.: Analog Performance Space Exploration by Normal-Boundary Intersection and by Fourier-Motzkin Elimination. IEEE Transactions on CAD of Integrated Circuits and Systems 26(10), 1733–1748 (2007)
Tang, H., Doboli, A.: High-Level Synthesis of Delta-Sigma Modulators Optimized for Complexity, Sensitivity and Power Consumption. IEEE Transactions on CAD of Integrated Circuits and Systems 25(3), 597–607 (2006)
Tang, H., Zhang, H., Doboli, A.: Refinement based Synthesis of Continuous-Time Analog Filters Through Successive Domain Pruning, Plateau Search and Adaptive Sampling. IEEE Transactions on CAD of Integrated Circuits and Systems 25(8), 1421–1440 (2006)
Torralba, A., Chavez, J., Franquelo, L.: FASY: a fuzzy-logic based tool for analog synthesis. IEEE Transactions on CAD of Integrated Circuits and Systems 15(7), 705–715 (1996)
Verhoeven, C., et al.: Structured Electronic Design - Negative-Feedback Amplifiers. Kluwer (2006)
Wei, Y., Tang, H., Doboli, A.: Systematic Methodology for Designing Reconfigurable Delta Sigma Modulator Topologies for Multimode Communication Systems. IEEE Transactions on CAD of Integrated Circuits and Systems 26(3), 480–496 (2007)
Wei, Y., Doboli, A.: Structural Macromodeling of Analog Circuits Through Model Decoupling and Transformation. IEEE Transactions on CAD of Integrated Circuits and Systems 27, 712–725 (2008)
Ferent, C., Doboli, A.: Systematic Comparison of Two Low-Voltage Amplifiers using Topology Matching and Performance Constraints. IEEE International New Circuits And Systems Conference, NEWCAS (2012)
Ferent, C., Doboli, A.: A Prototype Framework for Conceptual Design of Novel Analog Circuits. In: International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD (2012)
Kuo, K.-C., Leuciuc, A.: A Linear MOS Transconductor using Source Degeneration and Adaptive Biasing. IEEE Transactions on Circuits & Systems - II 48, 937–943 (2001)
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Ferent, C., Doboli, A. (2013). Improving Design Feature Reuse in Analog Circuit Design through Topological-Symbolic Comparison and Design Concept Combination. In: Fakhfakh, M., Tlelo-Cuautle, E., Castro-Lopez, R. (eds) Analog/RF and Mixed-Signal Circuit Systematic Design. Lecture Notes in Electrical Engineering, vol 233. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-36329-0_4
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DOI: https://doi.org/10.1007/978-3-642-36329-0_4
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