Abstract
In this paper, we proposed a parallel hardware methodology employing the modified Gaussian elimination algorithm to efficiently solve linear system of equations (LSEs). Two parallel operators are issued in the hardware-optimized algorithm. Moreover, to be the proof-of-concept, the proposed parallel methodology is implemented to hardware structures in cases to address solving LSEs over GF(2) (primarily are bits operation) and LSEs with floating-point (IEEE-754 standard, 32-bit single precision) coefficient matrix. The corresponding hardware is mainly composed of uniformly distributed basic cells which store and register data, yielding a standalone worst case time complexity O(n 2) opposed to O(n 3) of the software replication. Finally, the given experimental result inosculated with the theory analysis.
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Zhang, B., Gu, G., Sun, L., Zhang, X. (2013). A Novel Parallel Hardware Methodology for Solving Linear System of Equations. In: Xu, B. (eds) 2012 International Conference on Information Technology and Management Science(ICITMS 2012) Proceedings. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-34910-2_37
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DOI: https://doi.org/10.1007/978-3-642-34910-2_37
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