Formal Verification—The Industrial Perspective

Abstract

The ubiquitous use of digital electronic systems affects all aspects of modern life. While we all trust these devices to be functional, their design and verification have become increasingly complex. Increasing levels of functionality are integrated into connected devices, implemented on technology nodes, the geometry of which continues to shrink. This continued trend drives the well-known gap between the ability to manufacture chips with increasing functionality versus the resources required to design and verify that functionality in a reasonable amount of time. This is often referred to as the Verification Crisis. Finding functional problems late in the design process poses a huge commercial risk. In addition, time-to-market and budget requirements increase the pressure on design and verification teams to complete development programs more quickly. In order to limit the risk of failure during the development process, the industry is shifting methodologies and tools toward earlier validation and verification. Formal verification is an integral part of this technology shift. In this chapter, we look at some important application scenarios for Formal-based solutions and highlight key underlying technologies.