Keywords

1 Introduction

Renewable energy sources are increasingly important today. European Commission has set a target to raise the share of renewable energy to 20% before 2020 [1,2,3,4,5,6,7]. The topic of power electronics converters for renewable applications is extremely popular. Growing number of renewable energy installations leads to an increase in the storage systems installations. The technologies devised require bidirectional power interface with minimum losses between two dc busses or a dc bus and an energy storage device (battery, supercapacitor, etc.). For these purposes, Bidirectional DC-DC Converters (BDCs) should be used. In applications with lower step-up or step-down ratio, a common solution is a non-isolated type [8,9,10,11,12,13,14]. Many research papers focus on optimal solutions of the bidirectional energy transfer for applications where galvanic isolation is not required.

Recent solutions based on the Impedance-Source (IS) networks have been extended to various fields of application. IS-based converters have much higher boost capability than traditional boost converters. Also, they have no forbidden switching states. As a result, the proven advantages of IS-based converters consist in wide-range input voltage regulation along with enhanced reliability [15,16,17,18,19,19,16,17,18,]. At the same time, it has been clearly demonstrated that the proposed solutions have drawbacks in dc-ac applications in terms of power density and efficiency [15].

Though many studies focus on the IS-based converter, no comparative analyses of the bidirectional dc-dc converter based on any IS network have been reported. Due to the enhanced boost functionality, it can be an attractive and competitive solution.

This paper provides a comparative analysis of the proposed bidirectional quasi-Z-Source converter based on the criteria of passive volume, voltage stress on semiconductors and conduction losses.

2 Relation to Smart Systems

The concept of the “smart grid” is very popular and well known and can be considered as a part of the future “smart system”. It includes an electrical grid that has a variety of operational and energy measures, including smart meters, smart appliances, renewable energy resources and storage systems. Electronic power conditioning and control of the production and distribution of electricity are important aspects of the smart grid. The issue of communication is a very important element of the smart system and smart grid in particular, many researchers focus on that topic. At the same time, new standards of communication technologies such as 5G or IPV6 and their further development may satisfy a very high level of requirements and true obstacles lie in the “muscles” of the future smart system. It is evident that power electronics converters are present in any key module of the smart energy distributed systems. They are providing energy conversion and transfer and can be considered like “muscles” of the system. Such parameters like power density, weight, efficiency, reliability and cost of power electronics facilities define the feasibility of the abovementioned modern concept. Research and development of the power electronics facilities is a contribution to the future smart system.

3 Calculation Approach

This section focuses on the calculation of the passive elements of the circuit. To calculate the voltage drop and currents that flow through electrical components, the steady state analysis is used. Switches are assumed as ideal (Fig. 1).

Fig. 1.
figure 1

Traditional converter (a) and qZS converter (b).

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3.1 qZS

The qZS converter in a boost mode is controlled by a single switch T 2 (T 1 and T 3 are OFF). To reduce the conduction losses in the diode, T 1 and T 3 are opened when freewheeling diodes of these switches are conducting.

A period of switching consists of two time intervals: when the switch T 2 is opened (time interval T 0 ) and when the transistor is not conducting (time interval T 1 ).

Assuming that, energy flows from the battery, and the output source can be replaced by a load, or simply, by a resistor.

When the switch T 2 is opened (transistor is conducting), T 1 and T 3 are OFF (Fig. 2a). In this case, it possible to determine the voltage drop across the inductors L 1 and L 2 , the output current (current of discharging the capacitor C 3 ). Since voltage drop across the passive components equals the voltage source, it can be expressed for a circuit that consists of the inductor L 1 , the capacitor C 2 , and the input voltage source (battery):

Fig. 2.
figure 2

qZS in the active mode (a) and passive mode (b) of operation.

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$$ \nu_{{L_{1} }} = L_{1} \frac{{di_{IN} }}{dt} ,\,\nu_{{L_{2} }} = \nu_{{C_{2} }} ,\,\frac{{v_{{OUT}} }}{{{R}_{L} }} = - {C}_{ 3} \frac{{d\nu_{OUT} }}{dt} ,{\kern 1pt} \,\nu_{{L_{1} }} - \nu_{{C_{1} }} = V_{IN} .$$
(1)

When the switch T 2 is close (transistor is not conducting), freewheeling diodes conductivity of switches T 1 and T 3 is present (Fig. 2b). In the passive mode of operation, it is possible to determine voltages drop across the inductors L 1 and L 2 , voltages across the capacitors C 1 and C 2 :

$$ \nu_{{L_{1} }} = V_{IN} - \nu_{{C_{2} }} ,\,\,\nu_{{L_{2} }} = - \nu_{{C_{1} }} ,\,v_{{C_{1} }} + \nu_{{C_{2} }} = \nu_{OUT} .$$
(2)

Taking into account that the average voltage of the inductors over one switching period is zero and the average current of the capacitors over one switching period also equals zero, we obtain

$$ \langle\upnu_{L} \rangle = \frac{1}{T}\int\limits_{0}^{T} {\upnu_{L} } dt = 0,\,\langle {i}_{C} \rangle = \frac{ 1}{T}\int\limits_{0}^{T} {{i}_{C} } dt = 0 .$$
(3)

Considering the above, it is possible to derive voltages across the capacitors C 1 and C 2 and the output voltage, through input source voltage and duty cycle for the boost converter qZS [15, 16]:

$$ V_{{C_{1} }} = \frac{D}{{ 1 { - 2}D}}V_{IN} ,V_{{C_{2} }} = \frac{{ 1 { - }D}}{{ 1 { - 2}D}}V_{IN} ,\,V_{OUT} = \frac{{V_{IN} }}{{ 1 { - 2}D}},\,D = \frac{{V_{OUT} { - }V_{IN} }}{{ 2V_{OUT} }} .$$
(4)

During the period, currents through the inductor vary linearly (Fig. 3). Thus, the input current can be linearized as well. It is well known that the input ripple factor is the ratio of the input current ripple to a steady component of the current:

Fig. 3.
figure 3

Voltage across the capacitor and current in the inductor

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$$ K_{IN} = \frac{{\Delta i_{IN} }}{{\langle i_{IN} \rangle }} .$$
(5)

Taking into account that capacitor voltage change during the period is negligible, the ripple current along with the steady state component can be expressed as:

$$ \Delta i_{IN} = \frac{{V_{{L_{1} }} }}{{L_{1} }}{TD} = \frac{{V_{IN} + V_{{C_{1} }} }}{{L_{1} }}TD ,\,\langle i_{IN} \rangle = I_{IN} = \frac{P}{{V_{IN} }} .$$
(6)

Thus, based on Eqs. (4)–(6), the values of the inductances \( L_{1} \) and \( L_{2} \) are completely identical and can be estimated as:

$$ L_{1} = \frac{{(V_{OUT}^{2} - V_{IN}^{2} )V_{IN} }}{{4V_{OUT} K_{IN} Pf}},\,L_{2} = \frac{{(V_{OUT}^{2} - V_{IN}^{2} )V_{IN} }}{{ 4V_{OUT} K_{IN} Pf}} .$$
(7)

The output ripple factor is determined as the ratio of the output voltage ripple to a steady component of the output voltage:

$$ K_{OUT} = \frac{{\Delta V_{OUT} }}{{\langle \nu_{OUT} \rangle }} .$$
(8)

Similar to the input current, during the period, output voltage varies linearly (Fig. 3); thus, the output voltage can be linearized:

$$ \Delta V_{OUT} = \frac{{TDV_{OUT} }}{{C_{3} R_{L} }},\,\langle \nu_{OUT} \rangle = V_{OUT} ,\,R_{L} = \frac{{V_{OUT}^{2} }}{P} .$$
(9)

Thus, based on Eqs. (4), (8) and (9), and considering that a load resistor can be expressed through power, required output capacitance can be obtained as:

$$ C_{3} = \frac{{P(V_{OUT} - V_{IN} )}}{{ 2V_{OUT}^{3} K_{OUT} f}} .$$
(10)

Similarly, capacitance of the capacitors C 1 and C 2 can be found where the ripple factors are equal (K C1  = K C2  = K OUT ):

$$ C_{1} = \frac{P}{{K_{OUT} V_{OUT} V_{IN} f}},\,C_{2} = \frac{{(V_{OUT} - V_{IN} )P}}{{K_{OUT} (V_{OUT} + V_{IN} )V_{OUT}^{{}} V_{IN} f}} .$$
(11)

To further simplify analysis, it is assumed that both passive elements are equal and that the voltage of the inductors and the capacitors corresponds to \( V_{IN} = V_{OUT} /2 \):

$$ L = \frac{{3 \times V_{OUT}^{2} }}{{32 \times K_{IN} Pf}},\,C = \frac{P}{{4V_{OUT}^{2} K_{OUT} f}} .$$
(12)

3.2 Traditional Boost Converter

A traditional converter is calculated by the same approach [8]. Table 1 shows the results of calculation for both converters.

Table 1. Comparison of passive elements
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4 Simulation Results

Figure 4 shows the ripple of the input current and the output voltage for two converters. It can be seen that the steady state current and steady state voltage are the same in the two cases. But it is also shown that the ripple of the output voltage qZS converter is not of a linear character like that of a conventional converter. But absolute peak values correspond to the expected and coincide with the calculation part. Thus, it can be implemented in the experiment.

Fig. 4.
figure 4

Simulation results for the input current and the output voltage.

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In the simulation (for both converters), the following parameters were taken into account: P = 100 W, f = 50 kHz, V IN = 6 V, V OUT = 12 V, K OUT = 1.2%, K IN = 20%.

5 Comparative Analysis

The theoretical equations (Table 1) and simulation results presented in previous sections can be represented graphically. Figure 5 shows the curves for passive elements estimated in relative units as a function of the input voltage.

Fig. 5.
figure 5

Comparison of passive elements: inductances (a) and capacitances (b).

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To estimate the contribution of power switches and passive elements to the volume of the converter, the following criteria were taken into consideration. First of all, voltage stress on semiconductors and conduction losses in semiconductors were considered:

$$ T_{W} = \sum\limits_{i = 1}^{{N_{T} }} {V_{Ti} } ,\,P_{CL} = \sum\limits_{i = 1}^{{N_{T} }} {I_{RMSi}^{2} \times R_{DSoni} } .$$
(13)

Energy stored in the inductors and maximum energy stored in the capacitors is proportional to their volume:

$$ Vol_{L} \cong E_{{LW}} = \sum\limits_{{i = 1}}^{{N_{L} }} {\frac{{L_{i} I_{{AVi}}^{2} }}{2},\;Vol_{C} \cong E_{{CW}} = \sum\limits_{{i = 1}}^{{N_{C} }} {\frac{{C_{i} V_{{AVi}}^{2} }}{2}} .} $$
(14)

Based on the above formulas (13) and (14), results for each considered topology are presented in Table 2. The acquired expressions is valid only for the CCM operation mode.

Table 2. Summarized results of the analysis
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Numeric representation in relative units for boost coefficients 1.1 and 4 are shown in Fig. 6 (RMS current for the calculation of conduction losses was taken from the modeling results). Radial diagrams were built at constant output power for the boost operational mode. From the diagrams can be concluded that qZS converter by comparison to the conventional bidirectional dc-dc topology has larger volume of passive components and also larger losses in semiconductor devices. That is so due to the double quantity of passive elements and an additional switching element. Thus, larger size and volume are needed to store extra energy and in addition, total voltage stress is increasing slightly.

Fig. 6.
figure 6

Comparative analysis at constant output power: for VO = 1.1VIN (a) and (b); for VOUT = 4VIN (c).

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Figure 6c shows that at high boost coefficients, the qZS converter shows even worse results than at low coefficients (Figs. 6a and b). Also, the losses in the qZS converter is higher. Though the duty cycle of the conducting transistor is twice reduced, the peak value of current is twice larger, and as a result, the RMS value of the current is larger.

6 Conclusions

This paper presents the comparative analysis of qZS and conventional bidirectional dc-dc topologies. In the analysis, four parameters were taken into account: energy stored in the inductive and capacitive passive elements (which are reflected in their volumes), voltage stress on the semiconductor devices and conduction losses.

The comparison shows that the characteristics of the qZS topology are worse than those for the conventional solution in almost all cases in the boost mode of operation. Only when the boost coefficient dropped close to 1.1, the topologies showed similar results. The reason lies in the larger number of passive components and semiconductors. As a result, the cost, volume and complexity are higher, which restricts the use of that topology in real applications. The conventional solution seems to be preferable in the application discussed.