Abstract
Synthesis is the first step, which maps architecture-independent RTL code into technology-specific primitives. Usually, synthesis tools are supposed to isolate the users from knowing the device details. However, having a good idea of device primitives allows you to fine-tune the synthesis behavior. This might be required mainly for the following reasons:
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Guggilla, N.K., Dudha, C. (2017). Synthesis. In: Churiwala, S. (eds) Designing with Xilinx® FPGAs. Springer, Cham. https://doi.org/10.1007/978-3-319-42438-5_9
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DOI: https://doi.org/10.1007/978-3-319-42438-5_9
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Publisher Name: Springer, Cham
Print ISBN: 978-3-319-42437-8
Online ISBN: 978-3-319-42438-5
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