Implementation of Advanced Historical Computer Architectures

Abstract

Present day development of FPGAs enables us to implement even very complex computer architectures of the past with very few resources. Furthermore, they enable prospective electronic engineers, computer designers and computer scientists to experiment with those architectures, to gain experience and primarily to open up new possible perspectives on future computer architecture designs. In this chapter we present an implementation of the Cray-1 computer system on the E2LP platform. The initial publicly available generic FPGA design of the Cray processor was modified to fit the specifications of the E2LP board and the Spartan-6 FPGA. Aside from customizing the original design, a translator for the Cray Assembly Language was developed, as well as a basic bootloader to provide the use of this implementation as a teaching tool. The Cray-1 implementation facilitates a perfect learning setup for students of all levels. It can guide a student from the very basic stages which involve the synthesis and transfer of the Cray-1 design onto the E2LP board up to the embedded software design in a real, comprehensive, and historically industrially very significant Cray Assembly Language. Additionally, many advanced laboratory exercises can be made with the core Cray processor implementation on the E2LP board. The expansion of the Cray-1 design into a Cray-XMP, Cray-2 or some other computer from that series enables deep insight in the correspondence of instruction sets, registers and interdependent timings.