Skip to main content
SpringerLink
Log in

Reduced Representation of Power Grid Models

  • Chapter
  • First Online:
System Reduction for Nanoscale IC Design

Part of the book series: Mathematics in Industry ((MATHINDUSTRY,volume 20))

Abstract

We discuss the reduction of large-scale circuit equations with many terminals. Usual model order reduction (MOR) methods assume a small number of inputs and outputs. This is no longer the case, e.g., for the power supply network for the functional circuit elements on a chip. Here, the order of inputs/outputs, or terminals, is often of the same order as the number of equations. In order to apply classical MOR techniques to these power grids, it is therefore mandatory to first perform a terminal reduction. In this survey, we discuss several techniques suggested for this task, and develop an efficient numerical implementation of the extended SVD MOR approach for large-scale problems. For the latter, we suggest to use a truncated SVD computed either by the implicitly restarted Arnoldi method or the Jacobi-Davidson algorithm. We analyze this approach regarding stability, passivity, and reciprocity preservation, derive error bounds, and discuss issues arising in the numerical implementation of this method.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution
Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 54.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Similar content being viewed by others

Notes

  1. 1.

    Loosely speaking, a minimal realization of a descriptor system is a set of matrices (A, B, C, E) of minimal order yielding the transfer function G(s) of the system.

References

  1. Anderson, B.D.O., Vongpanitlerd, S.: Network Analysis and Synthesis. Prentice Hall, Englewood Cliffs, NJ (1973)

    Google Scholar 

  2. Antoulas, A.C.: Approximation of Large-Scale Dynamical Systems. SIAM Publications, Philadelphia, PA (2005)

    Book  MATH  Google Scholar 

  3. Antoulas, A.C., Ionita, A.C., Lefteriu, S.: On two-variable rational interpolation. Linear Algebra Appl. 436(8), 2889–2915 (2012)

    Article  MathSciNet  MATH  Google Scholar 

  4. Baglama, J., Reichel, L.: Augmented implicitly restarted Lanczos bidiagonalization methods. SIAM J. Sci. Comput. 27(1), 19–42 (2005). doi:http://dx.doi.org/10.1137/04060593X

  5. Benner, P.: Advances in balancing-related model reduction for circuit simulation. In: Roos, J., Costa, L.R.J. (eds.) Scientific Computing in Electrical Engineering SCEE 2008. Mathematics in Industry, vol. 14, pp. 469–482. Springer, Berlin/Heidelberg (2010)

    Chapter  Google Scholar 

  6. Benner, P., Schneider, A.: Model order and terminal reduction approaches via matrix decomposition and low rank approximation. In: Roos, J., Costa, L.R.J. (eds.) Scientific Computing in Electrical Engineering SCEE 2008. Mathematics in Industry, vol. 14, pp. 523–530. Springer, Berlin/Heidelberg (2010)

    Chapter  Google Scholar 

  7. Benner, P., Schneider, A.: On stability, passivity, and reciprocity preservation of ESVDMOR. In: Benner, P., Hinze, M., ter Maten, J. (eds.) Model Reduction for Circuit Simulation. Lecture Notes in Electrical Engineering, vol. 74, pp. 277–288. Springer, Berlin/Heidelberg (2011)

    Chapter  Google Scholar 

  8. Benner, P., Schneider, A.: Some remarks on a priori error estimation for ESVDMOR. In: Michielsen, B., Poirier, J.R. (eds.) Scientific Computing in Electrical Engineering SCEE 2010. Mathematics in Industry, vol. 16, pp. 15–24. Springer, Berlin/Heidelberg (2012)

    Chapter  Google Scholar 

  9. Benner, P., Quintana-Ortí, E.S., Quintana-Ortí, G.: Parallel model reduction of large-scale linear descriptor systems via balanced truncation. In: Proceedings of the 6th International Meeting on High Performance Computing for Computational Science VECPAR’04, Valencia, 28–30 June 2004, pp. 65–78 (2004)

    Google Scholar 

  10. Benner, P., Mehrmann, V., Sorensen, D.C. (eds.): Dimension Reduction of Large-Scale Systems. Lecture Notes in Computational Science and Engineering, vol. 45. Springer, Berlin/Heidelberg (2005)

    Google Scholar 

  11. Benner, P., Hinze, M., ter Maten, E.J.W. (eds.): Model Reduction for Circuit Simulation. Lecture Notes in Electrical Engineering, vol. 74. Springer, Dordrecht (2011)

    Google Scholar 

  12. Berry, M.W., Pulatova, S.A., Stewart, G.W.: Algorithm 844: Computing sparse reduced-rank approximations to sparse matrices. ACM Trans. Math. Softw. 31(2), 252–269 (2005). doi:http://doi.acm.org/10.1145/1067967.1067972

  13. Chan, T.F., Hansen, P.C.: Computing truncated singular value decomposition least squares solutions by rank revealing QR-factorizations. SIAM J. Sci. Stat. Comput. 11(3), 519–530 (1990)

    Article  MathSciNet  MATH  Google Scholar 

  14. Dai, L.: Singular Control Systems. Lecture Notes in Control and Information Sciences, vol. 118. Springer, Berlin (1989)

    Google Scholar 

  15. Feldmann, P., Freund, R.W.: Efficient linear circuit analysis by Padé approximation via the Lanczos process. In: Proceedings of EURO-DAC ’94 with EURO-VHDL ’94, Grenoble, pp. 170–175. IEEE Computer Society Press, Los Alamitos (1994)

    Google Scholar 

  16. Feldmann, P., Liu, F.: Sparse and efficient reduced order modeling of linear subcircuits with large number of terminals. In: ICCAD ’04: Proceedings of the 2004 IEEE/ACM International Conference Computer-Aided Design, pp. 88–92. IEEE Computer Society, Washington, DC (2004)

    Google Scholar 

  17. Feldmann, P., Freund, R.W., Acar, E.: Power grid analysis using a flexible conjugate gradient algorithm with sparsification. Tech. rep., Department of Mathematics, UC Davis (2006). http://www.math.ucdavis.edu/~freund/flexible_cg.pdf

    Google Scholar 

  18. Francis, B.A.: A Course in H ∞ Control Theory. Lecture Notes in Control and Information Sciences. Springer, Berlin/Heidelberg (1987)

    Book  Google Scholar 

  19. Freund, R.W.: Model reduction methods based on Krylov subspaces. Acta Numer. 12, 267–319 (2003)

    Article  MathSciNet  MATH  Google Scholar 

  20. Freund, R.W.: SPRIM: structure-preserving reduced-order interconnect macromodeling. In: Proceedings of the 2004 IEEE/ACM International Conference on Computer-Aided Design, ICCAD ’04, pp. 80–87. IEEE Computer Society, Washington, DC (2004)

    Google Scholar 

  21. Freund, R.W.: On Padé-type model order reduction of J-Hermitian linear dynamical systems. Linear Algebra Appl. 429(10), 2451–2464 (2008)

    Article  MathSciNet  MATH  Google Scholar 

  22. Freund, R.W.: The SPRIM algorithm for structure-preserving order reduction of general RCL circuits. In: Benner, P., Hinze, M., ter Maten, J. (eds.) Model Reduction for Circuit Simulation. Lecture Notes in Electrical Engineering, vol. 74, pp. 25–52. Springer, Berlin/Heidelberg (2011)

    Chapter  Google Scholar 

  23. Golub, G., Van Loan, C.: Matrix Computations, 3rd edn. Johns Hopkins University Press, Baltimore (1996)

    MATH  Google Scholar 

  24. Hochstenbach, M.E.: A Jacobi–Davidson type SVD method. SIAM J. Sci. Comput. 23(2), 606–628 (2001)

    Article  MathSciNet  MATH  Google Scholar 

  25. Ionutiu, R.: Model order reduction for multi-terminal systems with applications to circuit simulation. Ph.D. thesis, Jacobs University, Bremen and Technische Universiteit Eindhoven, Eindhoven (2011)

    Google Scholar 

  26. Ionutiu, R., Rommes, J., Schilders, W.H.A.: SparseRC: Sparsity preserving model reduction for RC circuits with many terminals. IEEE Trans. Circuits Syst. 30(12), 1828–1841 (2011)

    Google Scholar 

  27. Jain, J., Koh, C.K., Balakrishnan, V.: Fast simulation of VLSI interconnects. In: IEEE/ACM International Conference on Computer Aided Design, ICCAD-2004, pp. 93–98 (2004)

    Google Scholar 

  28. Kerns, K., Yang, A.: Stable and efficient reduction of large, multiport RC networks by pole analysis via congruence transformations. IEEE Trans. Circuits Syst. 16(7), 734–744 (1997)

    Google Scholar 

  29. Lefteriu, S., Antoulas, A.C.: A new approach to modeling multiport systems from frequency-domain data. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(1), 14–27 (2010)

    Article  Google Scholar 

  30. Lefteriu, S., Antoulas, A.C.: Topics in model order reduction with applications to circuit simulation. In: Benner, P., Hinze, M., ter Maten, E.J.W. (eds.) Model Reduction for Circuit Simulation. Lecture Notes in Electrical Engineering, vol. 74, pp. 85–107. Springer, Dordrecht (2011)

    Chapter  Google Scholar 

  31. Lehoucq, R.B., Sorensen, D.C., Yang, C.: ARPACK Users’ Guide: Solution of Large Scale Eigenvalue Problems with Implicitly Restarted Arnoldi Methods. Software, Environments, Tools, vol. 6, 142 p. SIAM, Society for Industrial and Applied Mathematics, Philadelphia, PA (1998)

    Google Scholar 

  32. Liu, P., Tan, S.X.D., Li, H., Qi, Z., Kong, J., McGaughy, B., He, L.: An efficient method for terminal reduction of interconnect circuits considering delay variations. In: ICCAD ’05: Proceedings of the 2005 IEEE/ACM International Conference on Computer-Aided Design, pp. 821–826. IEEE Computer Society, Washington, DC (2005)

    Google Scholar 

  33. Liu, P., Tan, S.X.D., Yan, B., McGaughy, B.: An extended SVD-based terminal and model order reduction algorithm. In: Proceedings of the 2006 IEEE International Behavioral Modeling and Simulation Workshop, pp. 44–49 (2006)

    Google Scholar 

  34. Liu, P., Tan, S.X.D., McGaughy, B., Wu, L., He, L.: TermMerg: an efficient terminal-reduction method for interconnect circuits. IEEE Trans. Circuits Syst. 26(8), 1382–1392 (2007). doi:10.1109/TCAD.2007.893554

    Google Scholar 

  35. Liu, P., Tan, S.X.D., Yan, B., McGaughy, B.: An efficient terminal and model order reduction algorithm. Integr. VLSI J. 41(2), 210–218 (2008)

    Article  Google Scholar 

  36. Lloyd, S.P.: Least squares quantization in PCM. IEEE Trans. Inform. Theory 28, 129–137 (1982)

    Article  MathSciNet  MATH  Google Scholar 

  37. Lozano, R., Maschke, B., Brogliato, B., Egeland, O.: Dissipative Systems Analysis and Control: Theory and Applications. Springer, New York, Inc., Secaucus, NJ (2000)

    Book  MATH  Google Scholar 

  38. Mehrmann, V., Stykel, T.: Balanced truncation model reduction for large-scale systems in descriptor form. In: Benner, P., Mehrmann, V., Sorensen, D.C. (eds.) Dimension Reduction of Large-Scale Systems. Lecture Notes in Computational Science and Engineering, vol. 45, pp. 83–115. Springer, Berlin/Heidelberg (2005)

    Chapter  Google Scholar 

  39. Odabasioglu, A., Celik, M., Pileggi, L.T.: PRIMA: passive reduced-order interconnect macromodeling algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(8), 645–654 (1998)

    Article  Google Scholar 

  40. Reis, T.: Circuit synthesis of passive descriptor systems – a modified nodal approach. Int. J. Circuit Theory Appl. 38(1), 44–68 (2010)

    Article  MATH  Google Scholar 

  41. Reis, T., Stykel, T.: Positive real and bounded real balancing for model reduction of descriptor systems. Int. J. Control 82(1), 74–88 (2010)

    Article  MathSciNet  MATH  Google Scholar 

  42. Schmidthausler, D., Schöps, S., Clemens, M.: Reduction of linear subdomains for non-linear electro-quasistatic field simulations. IEEE Trans. Magn. 49(5), 1669–1672 (2013). doi:10.1109/TMAG.2013.2238905

    Article  Google Scholar 

  43. Schneider, A.: Matrix decomposition based approaches for model order reduction of linear systems with a large number of terminals. Diplomarbeit, Chemnitz University of Technology, Faculty of Mathematics (2008)

    Google Scholar 

  44. Sorensen, D.C.: Implicit application of polynomial filters in a k-step Arnoldi method. SIAM J. Matrix Anal. Appl. 13(1), 357–385 (1992)

    Article  MathSciNet  MATH  Google Scholar 

  45. Stewart, G.W., Sun, J.G.: Matrix Perturbation Theory. Academic Press, inc., Boston, MA (1990)

    MATH  Google Scholar 

  46. Stoll, M.: A Krylov-Schur approach to the truncated SVD. Linear Algebra Appl. 436(8), 2795–2806 (2012)

    Article  MathSciNet  MATH  Google Scholar 

  47. Tan, S.X.D., He, L.: Advanced Model Order Reduction Techniques in VLSI Design. Cambridge University Press, New York (2007)

    Book  Google Scholar 

  48. Ye, Z., Vasilyev, D., Zhu, Z., Phillips, J.R.: Sparse implicit projection (SIP) for reduction of general many-terminal networks. In: Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design, ICCAD ’08, pp. 736–743. IEEE Press, Piscataway, NJ (2008)

    Google Scholar 

  49. Zecevic, A.I., Siljak, D.D.: Balanced decompositions of sparse systems for multilevel parallel processing. IEEE Trans. Circuits Syst. I: Fundam. Theory Appl. 41(3), 220–233 (1994)

    Article  MathSciNet  Google Scholar 

Download references

Acknowledgements

The authors want to thank Daniel Schmidthäusler, Sebastian Schöps and Georg Denk for their support. The work reported in this chapter was supported by the German Federal Ministry of Education and Research (BMBF), grant no. 03BEPAE1. Responsibility for the contents of this publication rests with the authors.

Author information

Authors and Affiliations

  1. Max Planck Institute for Dynamics of Complex Technical Systems, Sandtorstr. 1, 39106, Magdeburg, Germany

    Peter Benner & André Schneider

  2. Technische Universität Chemnitz, Fakultät für Mathematik, Reichenhainer Str. 39/41, 09126, Chemnitz, Germany

    Peter Benner

Authors
  1. Peter Benner
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. André Schneider
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Peter Benner .

Editor information

Editors and Affiliations

  1. Max Planck Institute for Dynamics of Complex Technical Systems, Magdeburg, Germany

    Peter Benner

Rights and permissions

Reprints and permissions

Copyright information

© 2017 Springer International Publishing AG

About this chapter

Cite this chapter

Benner, P., Schneider, A. (2017). Reduced Representation of Power Grid Models. In: Benner, P. (eds) System Reduction for Nanoscale IC Design. Mathematics in Industry, vol 20. Springer, Cham. https://doi.org/10.1007/978-3-319-07236-4_3

Download citation

Publish with us

Policies and ethics

Search

Navigation