Abstract
Tag prediction is proposed to reduce the leakage power consumption of instruction cache and the power consumption of branch prediction that represent a sizeable fraction of the total power consumption of embedded processors in this chapter. By extending the architectural control mechanism of the drowsy cache to predict the cache line read in the next access, the tag prediction wakes up the necessary cache line in advance, while the rest of cache line is in the drowsy mode. Empirical results show that the tag prediction reduces the 77 % power consumption compared to the policy adopting branch prediction, and the accuracy of tag prediction is roughly same with the accuracy of BTB prediction. By removing the BTB and adopting the technique of drowsy cache, the tag prediction effectively reduces the power consumption without significant impact on performance of processors.
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Li, W., Xiao, J. (2014). Leakage Power Reduction of Instruction Cache Based on Tag Prediction and Drowsy Cache. In: Wong, W.E., Zhu, T. (eds) Computer Engineering and Networking. Lecture Notes in Electrical Engineering, vol 277. Springer, Cham. https://doi.org/10.1007/978-3-319-01766-2_130
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DOI: https://doi.org/10.1007/978-3-319-01766-2_130
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