Abstract
3D integrated vertical interconnection technology is an effective way to realize miniaturization, lightweight and high integration of electronic RF system. This paper introduces and verifies a hybrid interconnection structure that combines multiple types of chip stacking and flip chip welding in detail. The vertical interconnection of multiple types of chips and substrates is realized through two assembly methods of lead bonding and flip chip bonding. Finally, multiple active chips and passive devices are high-density integrated in a 60 mm × 60 mm × 1.5 mm active link volume. Compared with the traditional 2D packaging structure, the hybrid interconnection structure can reduce the packaging volume by more than 40% and increase the interconnection density by more than 2 times, effectively meeting the target requirements of miniaturization, functional diversification and rapid response of electronic system equipment.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Yole Development.: 3DIC & TSV Interconnects [EB/OL]. http://www.i-micronews.com. 08 Sep. 2012
Farooq, G., Iyer, S.S.: 3D integration review. Sci. Chin. (Inf. Sci.) 5, 1012–1025 (2011)
Zhiguang, Z., Xu, Z., Xiao, L., Xiangyang, Q., Zhe, X.: A vertical interconnection method in tile T/R module. Sci. Technol. Eng. 13(11), 3104–3108 (2013)
Kitada, H., Akamatsu, T., Ishitsuka, T., et al.: 3D packaging technology to realize miniaturization high-density and high-performance servers. FUJITSU Sci. Tech. J. 53(2), 15–22 (2017)
Gabriel, H.L.: Computer architecture for die stacking. In: VLSI Technology, Systems, and Applications (VLSI-TSA), pp. 1–2. IEEE, Hsinchu, Taiwan (2012)
Lim, D.H., Athikulwongse, K., Healy, M., et al.: 3D-MAPS: 3D massively parallel processor with stacked memory. In: International Solid-State Circuits Conference (ISSCC), pp. 537–560. Springer, San Francisco (2013)
Xie, H., Cao L., Li, J., Zhang, T., Yu. G., Li, C., Wan, L.: A package design and realization for die-stacking system based on cavity-substrate technology. Sci. Technol. Eng. 20(14), 224–228 (2014)
Elenius, P., Levine, L.: Comparing flip-chip and wire-bond interconnection technologies. Chip Scale Rev. 4, 81–87 (2000)
Ren, C., Lu, K., D. R.: Flip chip technology and its application. Electron. Packag. 9(3), 15–20 2009
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2024 The Author(s), under exclusive license to Springer Nature Switzerland AG
About this paper
Cite this paper
Yang, C., Zhu, Z., Hu, M., Zhao, C., Long, X. (2024). Multi-Chip 3D Integrated Micro-System Based on Microwave Multilayer. In: Li, S. (eds) Computational and Experimental Simulations in Engineering. ICCES 2023. Mechanisms and Machine Science, vol 146. Springer, Cham. https://doi.org/10.1007/978-3-031-44947-5_95
Download citation
DOI: https://doi.org/10.1007/978-3-031-44947-5_95
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-031-44946-8
Online ISBN: 978-3-031-44947-5
eBook Packages: EngineeringEngineering (R0)