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Exploiting Logic Programming for Runtime Verification: Current and Future Perspectives

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Prolog: The Next 50 Years

Part of the book series: Lecture Notes in Computer Science ((LNAI,volume 13900))

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Abstract

In this paper we discuss how Logic Programming can be exploited for Runtime Verification, an activity where a monitor is in charge for checking whether an observed event is allowed in the current state. If this is the case, the monitor moves to the successive state, observes another event, and so on, until either a violation is detected, or the stream of events ends. If the system emitting events is expected to run forever, so does the monitor.

Being a semi-formal method, Runtime Verification must rely on a formal specification of the states of the observed system, and on a precise, formal description of the monitor’s behavior. These requirements, and the raising need to deal with partial observability of events, make the adoption of Logic Programming in the Runtime Verification domain extremely suitable, flexible and powerful.

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Notes

  1. 1.

    https://rmlatdibris.github.io/.

  2. 2.

    \(\mathcal {H}\) :- \(\mathcal {B}\) should be read as ‘if \(\mathcal {B}\) holds, then \(\mathcal {H}\) holds’.

  3. 3.

    The code of this simplified semantics is available from https://github.com/VivianaMascardi/VivianaMascardi.github.io/blob/main/Software/traceExprSimplifiedSemantics.pl.

  4. 4.

    In the real RV system, these events are generated by the SUS as a possibly infinite stream; the example provided here aims at simulating how the monitor works, assuming that events were previously logged and are hence a finite sequence.

  5. 5.

    In the first clause we should distinguish the case where the trace expression may halt (for example, it is eps), which is fine, from the case where the trace expression expects more events, which is instead a violation since the trace of events is the empty list []. The actual implementation in the RML repository provides a may_halt predicate to properly deal with these cases.

  6. 6.

    In the code available from the RML repository, we re-implemented substitution to manage the scope of a logical variable: hence, we can distinguish between the term P6 where we want A, B, X to be unified with the same values forever, and P6’ where we want them to remain the same in two consecutive ping pong events, but possibly change in the next round. In the RML language we exploit the let keyword and curly brackets to define the variable scope, as discussed in https://rmlatdibris.github.io/rml.html, ‘Parametric specifications’. The Prolog representation of trace expressions features the implementation of let. Given that terms can be cyclic, we used the coinduction library of SWI Prolog [75], to recognize when two cyclic terms are the same and manage them properly while applying substitutions, avoiding non-termination.

  7. 7.

    https://scholar.google.com/.

  8. 8.

    https://www.scala-lang.org/.

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  1. University of Genova, Genova, 16146, Italy

    Davide Ancona, Angelo Ferrando & Viviana Mascardi

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  1. Davide Ancona
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    David S. Warren

  2. Simon Fraser University, Burnaby, BC, Canada

    Veronica Dahl

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    Thomas Eiter

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    Manuel V. Hermenegildo

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    Robert Kowalski

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    Francesca Rossi

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Ancona, D., Ferrando, A., Mascardi, V. (2023). Exploiting Logic Programming for Runtime Verification: Current and Future Perspectives. In: Warren, D.S., Dahl, V., Eiter, T., Hermenegildo, M.V., Kowalski, R., Rossi, F. (eds) Prolog: The Next 50 Years. Lecture Notes in Computer Science(), vol 13900. Springer, Cham. https://doi.org/10.1007/978-3-031-35254-6_25

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