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Carry-Less to BIKE Faster

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Applied Cryptography and Network Security (ACNS 2022)

Abstract

Recent advances in the development of quantum computers manifest the urge to initiate the transition from classic public key cryptography to quantum secure algorithms. Therefore, NIST has initiated a post-quantum cryptography standardization process which is currently in its third and final round. One of the Key Encapsulation Mechanism (KEM) candidates is BIKE. In this paper we optimize the algorithm to achieve new speed-records for constant-time implementations of BIKE with parameter set bikel1 on two different embedded architectures. For the ARM Cortex-M4 we leverage the performance benefit of bit-polynomial multiplication in radix-16 to outperform existing implementations. We explore different algorithmic approaches on the RISC-V-based VexRiscv platform and implement parts of the standard RISC-V Bitmanip Extension to measure its impact on BIKE. Our results indicate boundaries and trade-offs between different approaches for bit-polynomial multiplication beyond the BIKE use-case.

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References

  1. Albrecht, M., et al.: Classic McEliece (2017). https://classic.mceliece.org/

  2. Aragon, N., et al.: BIKE–bit flipping key encapsulation (2017). https://bikesuite.org/

  3. Bachmeyer, J., et al.: RISC-V Bit-Manipulation ISA-extensions. https://github.com/riscv/riscv-bitmanip/releases/download/1.0.0/bitmanip-1.0.0.pdf

  4. Becker, L.A.: VexRiscv-Profiler: a measurement tool for the vexriscv. https://github.com/neunzehnhundert97/VexRiscv-Profiler

  5. Bernstein, D.J.: Cache-timing attacks on AES (2005)

    Google Scholar 

  6. Bernstein, D.J.: Batch binary edwards. In: Halevi, S. (ed.) CRYPTO 2009. LNCS, vol. 5677, pp. 317–336. Springer, Heidelberg (2009). https://doi.org/10.1007/978-3-642-03356-8_19

    Chapter  Google Scholar 

  7. Bodrato, M.: Towards optimal Toom-cook multiplication for univariate and multivariate polynomials in characteristic 2 and 0. In: Carlet, C., Sunar, B. (eds.) WAIFI 2007. LNCS, vol. 4547, pp. 116–133. Springer, Heidelberg (2007). https://doi.org/10.1007/978-3-540-73074-3_10

    Chapter  Google Scholar 

  8. Brent, R., Gaudry, P., Thomé, E., Zimmermann, P.: gf2x-1.3.0 (2021). https://gitlab.inria.fr/gf2x/gf2x

  9. Brent, R.P., Gaudry, P., Thomé, E., Zimmermann, P.: Faster multiplication in GF(2)[x]. In: van der Poorten, A.J., Stein, A. (eds.) ANTS 2008. LNCS, vol. 5011, pp. 153–166. Springer, Heidelberg (2008). https://doi.org/10.1007/978-3-540-79456-1_10

    Chapter  Google Scholar 

  10. Cantor, D.G., Kaltofen, E.: On fast multiplication of polynomials over arbitrary algebras. Acta Inform. 28(7), 693–701 (1991)

    Article  MathSciNet  MATH  Google Scholar 

  11. Chen, M.S., Chou, T.: Classic McEliece on the ARM Cortex-M4. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2021(3), 125–148 (2021). https://doi.org/10.46586/tches.v2021.i3.125-148, https://tches.iacr.org/index.php/TCHES/article/view/8970

  12. Chen, M.S., Chou, T., Krausz, M.: Optimizing BIKE for the intel Haswell and ARM Cortex-M4. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2021(3), 97–124 (2021). https://doi.org/10.46586/tches.v2021.i3.97-124, https://tches.iacr.org/index.php/TCHES/article/view/8969

  13. Cook, S.A., Aanderaa, S.O.: On the minimum computation time of functions. Trans. Am. Math. Soc. 142, 291–314 (1969)

    Article  MathSciNet  MATH  Google Scholar 

  14. Fritzmann, T., Sharif, U., Müller-Gritschneder, D., Reinbrecht, C., Schlichtmann, U., Sepulveda, J.: Towards reliable and secure post-quantum co-processors based on RISC-V. In: 2019 Design, Automation Test in Europe Conference Exhibition (DATE), pp. 1148–1153 (2019). https://doi.org/10.23919/DATE.2019.8715173

  15. Gueron, S., Kounavis, M.: Carry-less multiplication and its usage for computing the GCM mode. white paper, Intel Corporation (2008)

    Google Scholar 

  16. Jao, D., et al.: SIKE (2017). https://sike.org/

  17. Kannwischer, M.J., Rijneveld, J., Schwabe, P., Stoffelen, K.: PQM4: post-quantum crypto library for the ARM Cortex-M4. https://github.com/mupq/pqm4

  18. Kannwischer, M.J., Rijneveld, J., Schwabe, P., Stoffelen, K.: pqm4: testing and benchmarking NIST PQC on ARM Cortex-M4. IACR Cryptology ePrint Archive 2019, 844 (2019). https://eprint.iacr.org/2019/844

  19. Karatsuba, A.: Multiplication of multidigit numbers on automata. In: Soviet Physics Doklady, vol. 7, pp. 595–596 (1963)

    Google Scholar 

  20. Melchor, C.A., et al.: Hamming quasi-cyclic (HQC). NIST PQC Round 2, 4–13 (2018)

    Google Scholar 

  21. Montgomery, P.L.: Five, six, and seven-term Karatsuba-like formulae. IEEE Trans. Comput. 54(3), 362–369 (2005)

    Article  MATH  Google Scholar 

  22. Naehrig, M., et al.: FrodoKEM (2017). https://frodokem.org/

  23. Papon, C.: Spinalhdl. https://github.com/SpinalHDL/SpinalHDL

  24. Papon, C.: Vexriscv–32 bit RISC-V processor. https://github.com/SpinalHDL/VexRiscv

  25. Pircher, S., Geier, J., Zeh, A., Mueller-Gritschneder, D.: Exploring the RISC-V vector extension for the Classic McEliece post-quantum cryptosystem. In: 2021 22nd International Symposium on Quality Electronic Design (ISQED), pp. 401–407. IEEE (2021)

    Google Scholar 

  26. QuantumRISC: Quantumrisc–next generation cryptography for embedded systems (2020). https://www.quantumrisc.org/

  27. Roy, D.B., Fritzmann, T., Sigl, G.: Efficient hardware/software co-design for post-quantum crypto algorithm SIKE on ARM and RISC-V based microcontrollers. In: Proceedings of the 39th International Conference on Computer-Aided Design, pp. 1–9 (2020)

    Google Scholar 

  28. Schönhage, A., Strassen, V.: Schnelle multiplikation grosser zahlen. Computing 7(3), 281–292 (1971)

    Article  MathSciNet  MATH  Google Scholar 

  29. Sim, B.Y., Kwon, J., Choi, K.Y., Cho, J., Park, A., Han, D.G.: Novel side-channel attacks on quasi-cyclic code-based cryptography. IACR Transactions on Cryptographic Hardware and Embedded Systems, pp. 180–212 (2019)

    Google Scholar 

  30. Weimerskirch, A., Paar, C.: Generalizations of the Karatsuba algorithm for efficient implementations. IACR Cryptol. ePrint Arch. 2006, 224 (2006)

    Google Scholar 

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Acknowledgements

Some of this work was done while Ming-Shing Chen was working at Ruhr University Bochum, funded by the Deutsche Forschungsgemeinschaft (DFG, German Research Foundation) under Germany’s Excellence Strategy - EXC 2092 CASA - 390781972. The work of Markus Krausz and Jan Philipp Thoma was funded by the German Federal Ministry of Education and Research (BMBF) under the project “QuantumRISC” (ID 16KIS1038) [26] and project “PQC4MED” (ID 16KIS1044).

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Chen, MS., Güneysu, T., Krausz, M., Thoma, J.P. (2022). Carry-Less to BIKE Faster. In: Ateniese, G., Venturi, D. (eds) Applied Cryptography and Network Security. ACNS 2022. Lecture Notes in Computer Science, vol 13269. Springer, Cham. https://doi.org/10.1007/978-3-031-09234-3_41

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  • DOI: https://doi.org/10.1007/978-3-031-09234-3_41

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