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Hybrid Register Allocation with Spill Cost and Pattern Guided Optimization

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Languages and Compilers for Parallel Computing (LCPC 2021)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 13181))

Abstract

Modern compilers have relied on various best-effort heuristics to solve the register allocation problem due to its high computation complexity. A “greedy” algorithm that performs a scan of prioritized live intervals for allocation followed by interval splits and spills is one of the widely used register allocation mechanisms with consistent performance and low compile-time overheads. However, its live interval splitting heuristics suffer from making sub-optimal decisions for scenarios hard to predict, and recent effort to remedy the issue is not free from unintended side effects with performance degradation. In this paper, we propose Greedy-SO, a greedy register allocator with a spill cost and pattern guided optimization that systematically addresses inherent suboptimalities in live-interval splitting. Greedy-SO does this by avoiding splitting codes whose performance are more likely to be impacted by sub-optimal decisions. Greedy-SO identifies functions with such code patterns, precisely models the spill cost for them during the greedy allocation process, then when the spill cost starts to deteriorate, switches to an alternative allocator that does not use interval splitting. Our hybrid register allocator improves the performance of target benchmarks up to 16.1% (7.3% on average) with a low compilation overhead, while not impacting non-target benchmarks at all.

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Acknowledgement

This work was supported by Institute for Information & communications Technology Promotion (IITP) grants funded by the Korea government (MSIP) (No. 2019-0-01906, Artificial Intelligence Graduate School Program (POSTECH) and No. 2021-0-00310, AI Frameworks) and the Super Computer Development Leading Program of the National Research Foundation of Korea (NRF) funded by the Korean government (Ministry of Science and ICT (MSIT)) (No. 2020M3H6A1084853).

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Authors and Affiliations

  1. Pohang University of Science and Technology (POSTECH), Pohang, South Korea

    Yongwon Shin & Hyojin Sung

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  1. Yongwon Shin
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  2. Hyojin Sung
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Correspondence to Hyojin Sung .

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Editors and Affiliations

  1. Department of Electrical and Computer Engineering, University of Delaware, Newark, DE, USA

    Xiaoming Li

  2. Department of Computer Science, University of Delaware, Newark, DE, USA

    Sunita Chandrasekaran

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Shin, Y., Sung, H. (2022). Hybrid Register Allocation with Spill Cost and Pattern Guided Optimization. In: Li, X., Chandrasekaran, S. (eds) Languages and Compilers for Parallel Computing. LCPC 2021. Lecture Notes in Computer Science, vol 13181. Springer, Cham. https://doi.org/10.1007/978-3-030-99372-6_3

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  • DOI: https://doi.org/10.1007/978-3-030-99372-6_3

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  • Publisher Name: Springer, Cham

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  • Online ISBN: 978-3-030-99372-6

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