Skip to main content

Combined State Merging and Splitting Procedure for Low Power Implementations of Finite State Machines

  • Conference paper
  • First Online:
Advances in Systems Engineering (ICSEng 2021)

Part of the book series: Lecture Notes in Networks and Systems ((LNNS,volume 364))

Included in the following conference series:

  • 1157 Accesses

Abstract

A method of the synthesis of finite state machines is proposed. In this method, the power consumption criterion is taken into account already at the early stage of the synthesis process. The method is based on sequential merging and splitting two internal states regarding power consumption. This parameter may decrease with a reduction of internal states, but splitting internal states leads to switching activity reduction according to the decrease of the number of different state code values. The results of experiments showing the efficiency of the proposed approach are also considered.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 259.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 329.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 329.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Choudhury, S., Sistla Krishna, T., Chattopadhyay, S.: Genetic algorithm-based FSM synthesis with area-power trade-offs. Integr. VLSI J. 42(3), 376–384 (2009)

    Article  Google Scholar 

  2. Lindholm, C.: High frequency and low power semi-synchronous PFM state machine. In: Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), Rio de Janeiro, Brazil, 15–18 May 2011, pp. 1868–1871 (2011)

    Google Scholar 

  3. Pradhan, S.N., Kumar, M.T., Chattopadhyay, S.: Low power finite state machine synthesis using power-gating. Integr. VLSI J. 44(3), 175–184 (2011)

    Article  Google Scholar 

  4. Sait, S.M., Oughali, F.C., Arafeh, A.M.: FSM state-encoding for area and power minimization using simulated evolution algorithm. J. Appl. Res. Technol. 10, 845–858 (2012)

    Article  Google Scholar 

  5. Wang, L.-Y., Chu, Z.-F., Xia, Y.-S.: Low power state assignment algorithm for FSMs considering peak current optimization. J. Comput. Sci. Technol. 28(6), 1054–1062 (2013). https://doi.org/10.1007/s11390-013-1397-2

    Article  MathSciNet  Google Scholar 

  6. Rho, J.-K., Hachtel, G., Somenzi, F., Jacoby, R.: Exact and heuristic algorithms for the minimization of incompletely specified state machines. IEEE Trans. Comput.-Aided Des. 13, 167–177 (1994)

    Article  Google Scholar 

  7. Klimowicz, A., Solov'ev, V., Grzes, T.: Minimization method of finite state machines for low power design. In: 2015 Proceedings of Euromicro Conference on Digital System Design, Funchal, pp. 259–262 (2015)

    Google Scholar 

  8. Devadas, S., Ma, H.T., Newton, A.R., Sangiovanni-Vincentelli, A.: Irredundant sequential machines via optimal logic synthesis. IEEE Trans. Comput. Aided Des. 9(1), 8–17 (1990)

    Article  Google Scholar 

  9. Yuan, L., Qu, G., Villa, T., Sangiovanni-Vincentelli, A.: An FSM reengineering approach to sequential circuit synthesis by state splitting. IEEE Trans. Comput. Aided Des. 27(6), 1159–1164 (2008)

    Article  Google Scholar 

  10. Grzes, T.N., Solov’ev, V.V.: Minimization of power consumption of finite state machines by splitting their internal states. J. Comput. Syst. Sci. Int. 54(3), 367–374 (2015). https://doi.org/10.1134/S1064230715030090

    Article  MATH  Google Scholar 

  11. Klimowicz, A.S., Solov’ev, V.V.: Minimization of incompletely specified Mealy finite-state machines by merging two internal states. J. Comput. Syst. Sci. Int. 52(3), 400–409 (2013). https://doi.org/10.1134/S106423071303009X

    Article  MathSciNet  MATH  Google Scholar 

  12. Tsui, C.-Y., Monteiro, J., Devadas, S., et al.: Power estimation methods for sequential logic circuits. IEEE Trans. VLSI Syst. 3, 404–416 (1995)

    Article  Google Scholar 

  13. Grzes, T.N., Solov’ev, V.V.: Sequential algorithm for low-power encoding internal states of finite state machines. J. Comput. Syst. Sci. Int. 53(1), 92–99 (2014). https://doi.org/10.1134/S1064230714010067

  14. Yang, S.: Logic synthesis and optimization benchmarks user guide. Version 3.0. Technical report. Microelectronics Center of North Carolina, North Carolina (1991)

    Google Scholar 

  15. Lin, B., Newton, R.A.: Synthesis of multiple level logic from symbolic high-level description languages. In: Proceedings of the International Conference on VLSI, pp. 187–196 (1989)

    Google Scholar 

  16. Benini, L., DeMicheli, G.: State assignment for low power dissipation. IEEE J. Solid-State Circuits 30(3.25), 259–268 (1995)

    Google Scholar 

Download references

Acknowledgments

The work was supported by the WZ/WI-IIT/4/2020 and WZ/WI-IIT/2/2020 grants from Bialystok University of Technology and funded with resources for research by the Ministry of Science and Higher Education in Poland.

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Adam Klimowicz .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2022 The Author(s), under exclusive license to Springer Nature Switzerland AG

About this paper

Check for updates. Verify currency and authenticity via CrossMark

Cite this paper

Klimowicz, A., Grzes, T. (2022). Combined State Merging and Splitting Procedure for Low Power Implementations of Finite State Machines. In: Borzemski, L., Selvaraj, H., ÅšwiÄ…tek, J. (eds) Advances in Systems Engineering. ICSEng 2021. Lecture Notes in Networks and Systems, vol 364. Springer, Cham. https://doi.org/10.1007/978-3-030-92604-5_17

Download citation

Publish with us

Policies and ethics