Abstract
This chapter presents the design and evaluation of a reliable three-dimensional digital neuromorphic processor (R-NASH) geared explicitly toward the 3D-ICs biological brain’s three-dimensional structure. The platform enables high integration density and slight spike delay of spiking networks and features a scalable design. R-NASH is a design based on the Through-Silicon-Via technology, facilitating spiking neural network implementation on clustered neurons based on Network-on-Chip. In addition, we provide a memory interface with the host CPU, allowing for online training and inference of spiking neural networks. Moreover, R-NASH supports fault detection and recovery with graceful performance degradation.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Similar content being viewed by others
References
Ahmed AB, Abdallah AB (2014) Graceful deadlock-free fault-tolerant routing algorithm for 3D Network-on-Chip architectures. J Parallel Distrib Comput 74(4):2229–2240
Akopyan F et al (2015) TrueNorth: Design and tool flow of a 65 mW 1 million neuron programmable neurosynaptic chip. IEEE Trans Comput Aided Des Integr Circuits Syst 34(10):1537–1557
Banerjee K et al (2001) 3-D ICs: A novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration. Proc IEEE 89(5):602–633
Ben Abdallah A, Dang KN (2021) Toward robust cognitive 3d brain-inspired cross-paradigm system. Frontiers Neurosci 15:795
Ben Ahmed A, Ben Abdallah A (2013) Architecture and design of high-throughput, low-latency, and fault-tolerant routing algorithm for 3D-network-on-chip (3D-NoC). J Supercomput 66(3):1507–1532
Benjamin BV, et al (2014) Neurogrid: A mixed-analog-digital multichip system for large-scale neural simulations. Proc IEEE 102(5):699–716
Dang KN, Ahmed AB, Okuyama Y, Abdallah AB (2020) Scalable design methodology and online algorithm for TSV-cluster defects recovery in highly reliable 3d-NoC systems. IEEE Trans Emerg Top Comput 8(3):577–590
Dang KN, Ben Abdallah A (2019) An efficient software-hardware design framework for spiking neural network systems. In: 2019 International conference on internet of things, embedded systems and communications (IINTEC), pp 155–162
Davies M et al (2018) Loihi: A neuromorphic manycore processor with on-chip learning. IEEE Micro 38(1):82–99
Diehl PU, Cook M (2015) Unsupervised learning of digit recognition using spike-timing-dependent plasticity. Front Comput Neurosci 9:99
Diehl PU et al (2015) Fast-classifying, high-accuracy spiking deep networks through weight and threshold balancing. In: 2015 International joint conference on neural networks (IJCNN), July 2015, pp 1–8
Eliasmith C, Stewart TC, Choo X, Bekolay T, DeWolf T, Tang Y, Rasmussen D (2012) A large-scale model of the functioning brain. Science 338(6111):1202–1205
Furber S (2016) Large-scale neuromorphic computing systems. J Neural Eng 13(5):051001
SB Furber et al (2014) The SpiNNaker project. Proc IEEE 102(5):652–665
JH Goldwyn, Imennov NS, Famulare M, Shea-Brown E (2011) Stochastic differential equation models for ion channel noise in Hodgkin-Huxley neurons. Phys Rev E 83:4190–4208
Hazan H et al (2018) BindsNET: A machine learning-oriented spiking neural networks library in Python. Front Neuroinform 12:89
Holland JH et al (1992) Adaptation in natural and artificial systems: an introductory analysis with applications to biology, control, and artificial intelligence. MIT Press
Hsiao MY (1970) A class of optimal minimum odd-weight-column SEC-DED codes. IBM J Res Devel 14(4):395–401
Jin X (2010) Parallel simulation of neural networks on spinnaker universal neuromorphic hardware. The University of Manchester (United Kingdom)
Lee HG, Chang N, Ogras UY, Marculescu R (2008) On-chip communication architecture exploration: A quantitative evaluation of point-to-point, bus, and network-on-chip approaches. ACM Trans Des Autom Electron Syst (TODAES) 12(3):1–20
Levin JA, Rangan V, Malone EC (2014) Efficient hardware implementation of spiking networks. Patent No. US 2014/0351190 A1, Filed May 1, 2014, Pub. Date Nov. 27, 2014
Mahmoodi H et al (2008) Ultra low-power clocking scheme using energy recovery and clock gating. IEEE Trans Very Large Scale Integr (VLSI) Syst 17(1):33–44
Ogbodo M, Vu T, Dang K, Ben Abdallah A (2020) Light-weight spiking neuron processing core for large-scale 3D-NoC based spiking neural network processing systems. In: 2020 IEEE international conference on big data and smart computing (BigComp), pp 133–139
Panth SA, Samadi K, Du Y, Lim SK (2014) Design and cad methodologies for low power gate-level monolithic 3d ICS. In: Proceedings of the 2014 international symposium on low power electronics and design, pp 171–176
Purves D, Augustine G, Fitzpatrick D, Hall W, LaMantia AS, McNamara J (2008) Neuroscience. Sinauer Associates
Rueckauer B et al (2017) Conversion of continuous-valued deep networks to efficient event-driven networks for image classification. Frontiers Neurosci 11:682
J Schemmel et al (2010) A wafer-scale neuromorphic hardware system for large-scale neural modeling. In: Proceedings of 2010 IEEE international symposium on circuits and systems, May 2010, pp 1947–1950
Sengupta A, Ye Y, Wang R, Liu C, Roy K (2019) Going deeper in spiking neural networks: Vgg and residual architectures. Frontiers Neurosci 13:95
Stimberg M, Brette R, Goodman DF (2019) Brian 2, an intuitive and efficient neural simulator. eLife 8:e47314
Vu TH, Okuyama Y, Ben Abdallah A (2019) Comprehensive analytic performance assessment and K-means based multicast routing algorithm and architecture for 3D-NoC of spiking neurons. J Emerg Technol Comput Syst 15(4):34:1–34:28
Waldrop MM (2016) More than moore. Nature 530(7589):144–148
Wu Y, Deng L, Li G, Zhu J, Shi L (2018) Spatio-temporal backpropagation for training high-performance spiking neural networks. Frontiers Neurosci 12:331
Yin S, Venkataramanaiah SK, Chen GK, Krishnamurthy R, Cao Y, Chakrabarti C, and Seo JS (2017) Algorithm and hardware design of discrete-time spiking neural networks based on back propagation with binary activations. In: 2017 IEEE biomedical circuits and systems conference (BioCAS). IEEE, pp. 1–5
Author information
Authors and Affiliations
Corresponding authors
Rights and permissions
Copyright information
© 2022 The Author(s), under exclusive license to Springer Nature Switzerland AG
About this chapter
Cite this chapter
Ben Abdallah, A., N. Dang, K. (2022). Case Study: Real Hardware-Software Design of 3D-NoC-Based Neuromorphic System. In: Neuromorphic Computing Principles and Organization. Springer, Cham. https://doi.org/10.1007/978-3-030-92525-3_8
Download citation
DOI: https://doi.org/10.1007/978-3-030-92525-3_8
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-030-92524-6
Online ISBN: 978-3-030-92525-3
eBook Packages: Computer ScienceComputer Science (R0)