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Digital Analog Converter for the Extraction of Test Signals from Mixed Integrated Circuits

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Computational Science and Its Applications – ICCSA 2021 (ICCSA 2021)

Abstract

The construction of integrated circuits involves testing the correct operation of its internal blocks. For this, a common practice is the integration of functional blocks to stimulate the internal subsystems and extract the responses to those stimuli. In this article, the design and simulation of a circuit for the extraction of the response signals of the devices under test in analog and mixed-signal integrated circuits is presented. The extraction block is a 2-stage 5-bit segmented A/D converter, operating at a sampling frequency of 10 MHz, implemented in a 0.12 µm technological process, which can be powered with 1.5 Vdc. This proposal offers a reduction in the area consumed, by requiring fewer comparators than other similar solutions found in the literature.

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References

  1. Simancas-García, J.L.: Diagnóstico de Circuitos Integrados Analógicos y de Comunicaciones. INGE@UAN - Tendencias en la Ingeniería 1(2), 7–19 (2011)

    Google Scholar 

  2. Kundert, K., et al.: Design of mixed-signal systems-on-a-chip. IEEE Trans. Comput.-Aided Des. Integr. Circuita Syst. 19(12), 1561–1571 (2000)

    Article  Google Scholar 

  3. Zorian, Y., Marinissen, E., Dey, S.:Testing embedded-core-based sys- tem chips. In: IEEE Computer, pp. 52–60. Junio (1999)

    Google Scholar 

  4. Hafed, M., Abaskharoun, N., Roberts, G.: A 4-GHz effective sample rate integrated test core for analog and mixed-signal circuits. IEEE J. Solid-State Circuits 37(4), 499–514 (2002)

    Article  Google Scholar 

  5. Hafed, M., Roberts, G.: A stand-alone integrated excitation/extraction systems for analog BIST application. In: IEEE 2000 Costum Integrated Circuit Conference, p. 4. IEEE (2000)

    Google Scholar 

  6. Hafed, M., Roberts, G.: Techniques for high-frequency integrated test and measurement. IEEE Trans. Instrument. Measur. 52(16), 1780–1786 (2003)

    Article  Google Scholar 

  7. Zorian, Y.: System-chips test strategies. In: 35th Design Automation Conference 1998, San Francisco, p. 6. ACM (1998)

    Google Scholar 

  8. Albustani, H.: Modelling methods for testability analysis of analog integrated circuits based on pole-zero analysis. Prüfung, 182 p. Dissertation (Ph.D.). Universität Duisburg-Essen. Fakultät für Ingenieurwissenschaften (2004)

    Google Scholar 

  9. Dillinger, T.: VLSI Engineering, p. 863. Prentice-Hall, Estados Unidos (1988)

    Google Scholar 

  10. Deschamps, J.-P.: Diseño de circuitos integrados de aplicación especifica ASIC, p. 385. Paraninfo, España (1994)

    Google Scholar 

  11. Pucknell, D., Eshraghian, K.: Basic VLSI design, 3rd edn., p. 495. Prentice-Hall, Australia (1993)

    Google Scholar 

  12. Dufort, B., Roberts, G.: Signal generation using periodic single and multi- bit sigma-delta modulated streams, p. 10 (1997)

    Google Scholar 

  13. Dufort, B., Roberts, G.: Optimized periodic sigma-delta bitstreams for analog signal generation, vol. 4, p. 4

    Google Scholar 

  14. Haurie, X., Roberts, G.: Arbitrary-precision signal generation for mixed-signal built-in-self-test. IEEE Trans. Circuits Syst.—II Analog Digital Signal Process. 45(11), 1425–1432 (1998)

    Article  Google Scholar 

  15. Hawrysh, E., Roberts, G.: An integration of memory-based analog signal generation into current dft architectures. IEEE Trans. Instrument. Measur. 47(3), 748–759 (1998)

    Article  Google Scholar 

  16. Simancas-García, J.L., Caicedo-Ortiz, J.G.: Modelo computacional de un modulador ∑-∆ de 2° orden para la generación de señales de prueba en circuitos integrados analógicos. INGE@UAN - Tendencias en la Ingeniería 5(9), 43–55 (2014)

    Google Scholar 

  17. Rubio, A., et al.: Diseño de circuitos y sistemas integrados, p. 446. Alfaomega, Mexico (2005)

    Google Scholar 

  18. Soria Olivas, E., et al.: Tratamiento digital de señales: Problemas y ejercicios resueltos, p. 400. Prentice-Hall, España (2003)

    Google Scholar 

  19. Aziz, P., Sorensen, H., Van Der Spiegel, J.: An overview of sigma-delta converters: how a 1-bit ADC achieves more than 16-bit resolution. IEEE Sig. Process. Magazine, 61–84 (1996)

    Google Scholar 

  20. Proakis, J., Manolakis, D.: Tratamiento digital de señales: Principios, algoritmos, y aplicaciones, 3rd edn. Prentice-Hall, España (2003)

    Google Scholar 

  21. Franco, S.: Design with Operational Amplifiers and Analog Integrated Circuits, 3rd edn., p. 680. MacGraw-Hill, Estados Unidos (2002)

    Google Scholar 

  22. Rashid, M.: Circuitos Microelectrónicos: Análisis y Diseño, p. 990. International Thomson, México (1999)

    Google Scholar 

  23. Sedra, A., Smith, K.: Circuitos Microelectrónicos, 4th edn., p. 1232. Oxford University, México (1998)

    Google Scholar 

  24. Van De Plassche, R., Baltus, M.: An 8-bit 100-MHZ full-Nyquist analog-to-digital converter. IEEE J. Solid-State Circuits 23(6), 1334–1344 (1988)

    Article  Google Scholar 

  25. Simancas-García, J.L.: Diseño de un Amplificador Operacional CMOS de Amplio Ancho de Banda y Alta Ganancia para Aplicaciones de Alta Velocidad. In: IngeCUC, vol. 9, no. 1 (2013)

    Google Scholar 

  26. Sicard, E.: Microwind & Dsch User’s Manual Version 2, p. 110. National Institute of Applied Sciences, Toulouse, Francia (2002)

    Google Scholar 

  27. Pavlidis, A., Louërat, M.-M., Faehn, E., Kumar, A., Stratigopoulos, H.-G.: SymBIST: symmetry-based analog and mixed-signal built-in self-test for functional safety. IEEE Trans. Circuits Syst. I Regul. Pap. 68(6), 2580–2593 (2021)

    Article  Google Scholar 

  28. Thaker, N.B., Ashok, R., Manikandan, S., Nambath, N., Gupta, S.: A cost-effective solution for testing high-performance integrated circuits. IEEE Trans. Compon. Packag. Manuf. Technol. 11(4), 557–564 (2021)

    Article  Google Scholar 

  29. Stratigopoulos, H.-G., Streitwieser, C.: Adaptive test with test escape estimation for mixed-signal ICs. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 37(10), 2125–2138 (2017)

    Article  Google Scholar 

  30. Shi, J., Deng, Y., Wang, Z., He, Q.: A combined method for analog circuit fault diagnosis based on dependence matrices and intelligent classifiers. IEEE Trans. Instrument. Measur. 69(3), 782–793 (2019)

    Article  Google Scholar 

  31. Canelas, A., Póvoa, R., Martins, R., Lourenço, N., Guilherme, J., Carvalho, J.P.: FUZYE: a fuzzy c-means analog IC yield optimization using evolutionary-based algorithms. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 39(1), 1–13 (2018)

    Article  Google Scholar 

  32. Sehgal, A., Liu, F., Ozev, S., Chakrabarty, K.: Test planning for mixed-signal SOCS with wrapped analog cores. In: Design Automation and Test in Europe Conference and Exhibition, Munich, 2005, pp. 50–55. IEEE Computer Society, Munich (2005)

    Google Scholar 

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Correspondence to Ramón E. R. González or Carlos Andrés Collazos-Morales .

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Simancas-García, J.L., Meléndez-Pertuz, F.A., González, R.E.R., Cárdenas, C.A., Collazos-Morales, C.A. (2021). Digital Analog Converter for the Extraction of Test Signals from Mixed Integrated Circuits. In: Gervasi, O., et al. Computational Science and Its Applications – ICCSA 2021. ICCSA 2021. Lecture Notes in Computer Science(), vol 12949. Springer, Cham. https://doi.org/10.1007/978-3-030-86653-2_15

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  • DOI: https://doi.org/10.1007/978-3-030-86653-2_15

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