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FPGA in Core Calculation for Big Datasets

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Computer Information Systems and Industrial Management (CISIM 2021)

Part of the book series: Lecture Notes in Computer Science ((LNISA,volume 12883))

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Abstract

The rough sets theory developed by Prof. Z. Pawlak is one of the tools used in intelligent systems for data analysis and processing. In modern systems, the amount of the collected data is increasing quickly, so the computation speed becomes the critical factor. This paper shows FPGA and softcore CPU based hardware solution for big datasets core calculation focusing on rough set methods. Core represents attributes cannot be removed without affecting the classification power of all condition attributes. Presented architectures have been tested on real datasets by running presented solutions inside two different FPGA chips. Datasets had 1 000 to 1 000 000 objects. The same operations were performed in software implementation. Results show the up to 15.83 times increase factor in computation time using hardware supporting core generation in comparison to pure software implementation.

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References

  1. Banerjee, A., Maji, P.: Segmentation of bias field induced brain MR images using rough sets and stomped-t distribution. Inf. Sci. 504, 520–545 (2019)

    Article  MathSciNet  Google Scholar 

  2. Chen, Y.S., Cheng, C.H.: Hybrid models based on rough set classifiers for setting credit rating decision rules in the global banking industry. Knowl.-Based Syst. 39, 224–239 (2013)

    Article  Google Scholar 

  3. Grześ, T., Kopczyński, M., Stepaniuk, J.: FPGA in rough set based core and reduct computation. In: Lingras, P., Wolski, M., Cornelis, C., Mitra, S., Wasilewski, P. (eds.) RSKT 2013. LNCS (LNAI), vol. 8171, pp. 263–270. Springer, Heidelberg (2013). https://doi.org/10.1007/978-3-642-41299-8_25

    Chapter  Google Scholar 

  4. Grzes, T., Kopczynski, M.: Hardware implementation on field programmable gate array of two-stage algorithm for rough set reduct generation. In: Mihálydeák, T., Min, F., Wang, G., Banerjee, M., Düntsch, I., Suraj, Z., Ciucci, D. (eds.) IJCRS 2019. LNCS (LNAI), vol. 11499, pp. 495–506. Springer, Cham (2019). https://doi.org/10.1007/978-3-030-22815-6_38

    Chapter  Google Scholar 

  5. Jiang, H., Zhan, J., Sun, B., Alcantud, J.C.R.: An MADM approach to covering-based variable precision fuzzy rough sets: an application to medical diagnosis. Int. J. Mach. Learn. Cybern. 11(9), 2181–2207 (2020). https://doi.org/10.1007/s13042-020-01109-3

    Article  Google Scholar 

  6. Kanasugi, A., Yokoyama, A.: A basic design for rough set processor. In: The 15th Annual Conference of Japanese Society for Artificial Intelligence (2001)

    Google Scholar 

  7. Kopczyński, M., Stepaniuk, J.: Rough set methods and hardware implementations. Zeszyty Naukowe Politechniki Białostockiej. Informatyka Zeszyt 8, 5–18 (2011)

    Google Scholar 

  8. Kopczyński, M., Stepaniuk, J.: Hardware implementations of rough set methods in programmable logic devices. In: Rough Sets and Intelligent Systems - Professor Zdzisław Pawlak in Memoriam, Intelligent Systems Reference Library, vol. 43, pp. 309–321 Heidelberg, Springer (2013)

    Google Scholar 

  9. Kopczyński, M., Grześ, T., Stepaniuk, J.: FPGA in rough-granular computing : reduct generation. In: WI 2014: The 2014 IEEE/WCI/ACM International Joint Conferences on Web Intelligence, Warsaw, IEEE Computer Society, vol. 2, pp. 364–370 (2014)

    Google Scholar 

  10. Kopczynski, M., Grzes, T., Stepaniuk, J.: Generating core in rough set theory: design and implementation on FPGA. In: Kryszkiewicz, M., Cornelis, C., Ciucci, D., Medina-Moreno, J., Motoda, H., Raś, Z.W. (eds.) RSEISP 2014. LNCS (LNAI), vol. 8537, pp. 209–216. Springer, Cham (2014). https://doi.org/10.1007/978-3-319-08729-0_20

    Chapter  Google Scholar 

  11. Kopczynski, M., Grzes, T., Stepaniuk, J.: Computation of cores in big datasets: An FPGA approach. In: Ciucci, D., Wang, G., Mitra, S., Wu, W.-Z. (eds.) RSKT 2015. LNCS (LNAI), vol. 9436, pp. 153–163. Springer, Cham (2015). https://doi.org/10.1007/978-3-319-25754-9_14

    Chapter  Google Scholar 

  12. Kopczyński, M., Grześ, T., Stepaniuk, J.: Core for large datasets : rough sets on FPGA. Fundamenta Informaticae 147, 241–259 (2016)

    Google Scholar 

  13. Lewis, T., Perkowski, M., Jozwiak, L.: Learning in hardware: architecture and implementation of an FPGA-based rough set machine. euromicro, vol. 1, 25th Euromicro Conference (EUROMICRO 1999), vol. 1, 1326 (1999)

    Google Scholar 

  14. Lichman, M.: UCI Machine Learning Repository. Irvine, CA: University of California, School of Information and Computer Science (2013). [http://archive.ics.uci.edu/ml]

  15. Marz, N., Warren, J.: Big Data: Principles and Best Practices of Scalable Realtime Data Systems. Manning Publications Co. (2015)

    Google Scholar 

  16. Mehdipour F., Noori H., Javadi B.: Energy-efficient big data analytics in datacenters. Adv. Comput. 100, 59–101 (2016)

    Google Scholar 

  17. Muraszkiewicz, M., Rybiński, H.: Towards a parallel rough sets computer. In: Rough Sets, Fuzzy Sets and Knowledge Discovery. Springer-Verlag, pp. 434–443 (1994)

    Google Scholar 

  18. Penmatsa, R.K.V., Kalidindi, A., Mallidi, S.K.R.: Feature reduction and optimization of malware detection system using ant colony optimization and rough sets. Int. J. Inf. Secur. Privacy 14, 95–114 (2020)

    Article  Google Scholar 

  19. Pawlak, Z.: Rough Sets. Theoretical Aspects of Reasoning about Data. Kluwer Academic, Dordrecht (1991)

    Google Scholar 

  20. Pawlak, Z.: Elementary rough set granules: toward a rough set processor. In: Rough-Neurocomputing: Techniques for Computing with Words, Cognitive Technologies, Springer-Verlag, Berlin, Germany, pp. 5–14 (2004)

    Google Scholar 

  21. Pawlak, Z., Skowron, A.: Rudiments of rough sets. Inf. Sci. 177(1), 3–27 (2007)

    Google Scholar 

  22. Stepaniuk, J.: Knowledge discovery by application of rough set models. In: Rough Set Methods and Applications. New Developments in Knowledge Discovery, Information Systems, Physica-Verlag, Heidelberg, pp. 137–233 (2000)

    Google Scholar 

  23. Stepaniuk, J.: Rough–Granular Computing in Knowledge Discovery and Data Mining. Springer (2008)

    Google Scholar 

  24. Stepaniuk, J., Kopczyński, M., Grześ, T.: The first step toward processor for rough set methods. Fundam. Informaticae 127, 429–443 (2013)

    Article  Google Scholar 

  25. Sun, L., Xu, J., Li, Y.: A feature selection approach of inconsistent decision systems in rough set. J. Comput. 9, 1333–1340 (2014)

    Google Scholar 

  26. Tiwari, K.S., Kothari, A.G., Keskar, A.G.: Reduct generation from binary discernibility matrix: an hardware approach. Int. J. Future Comput. Commun. 1(3), 270–272 (2012)

    Article  Google Scholar 

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Acknowledgements

The work was supported by the grant WZ/WI-IIT/2/2020 from Bialystok University of Technology and funded with resources for research by the Ministry of Science and Higher Education in Poland.

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Authors and Affiliations

  1. Faculty of Computer Science, Bialystok University of Technology, Wiejska 45A, 15-351, Bialystok, Poland

    Maciej Kopczyński

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  1. Maciej Kopczyński
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Correspondence to Maciej Kopczyński .

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Editors and Affiliations

  1. Bialystok University of Technology, Bialystok, Poland

    Khalid Saeed

  2. VSB - Technical University of Ostrava, Ostrava, Czech Republic

    Jiří Dvorský

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Kopczyński, M. (2021). FPGA in Core Calculation for Big Datasets. In: Saeed, K., Dvorský, J. (eds) Computer Information Systems and Industrial Management. CISIM 2021. Lecture Notes in Computer Science(), vol 12883. Springer, Cham. https://doi.org/10.1007/978-3-030-84340-3_33

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  • DOI: https://doi.org/10.1007/978-3-030-84340-3_33

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-030-84339-7

  • Online ISBN: 978-3-030-84340-3

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