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Design of Reliable NoC Architectures

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Network-on-Chip Security and Privacy

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Abstract

Communication network in the computing realm has always played a vital role towards providing an efficient processing environment. In the past decades, rapid miniaturization has introduced newer challenges and has further stressed on the importance of on-chip communication, as efficient communication between the components on the chip proves to be crucial factor in meeting the overall performance goals. A Network-on-Chip (NoC) has proven to be a trustworthy solution to meet the communication requirements of a System-on-Chip (SoC). This chapter investigates the factors affecting the reliability of an NoC architecture and presents efficient design paradigms to meet the reliability challenges.

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Notes

  1. 1.

    A timing error is observed when the pipe stage delay in exceeds the clock period.

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Authors and Affiliations

  1. Utah State University, Logan, UT, USA

    Noel Daniel Gundi, Prabal Basu, Sanghamitra Roy & Koushik Chakraborty

Authors
  1. Noel Daniel Gundi
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  2. Prabal Basu
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  3. Sanghamitra Roy
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  4. Koushik Chakraborty
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Correspondence to Noel Daniel Gundi .

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Editors and Affiliations

  1. University of Florida, Gainesville, FL, USA

    Prabhat Mishra

  2. University of Moratuwa, Colombo, Sri Lanka

    Subodha Charles

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Gundi, N.D., Basu, P., Roy, S., Chakraborty, K. (2021). Design of Reliable NoC Architectures. In: Mishra, P., Charles, S. (eds) Network-on-Chip Security and Privacy. Springer, Cham. https://doi.org/10.1007/978-3-030-69131-8_14

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  • DOI: https://doi.org/10.1007/978-3-030-69131-8_14

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  • Online ISBN: 978-3-030-69131-8

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