Abstract
In this paper, a partitioning scheme is proposed to improve the performance of x-Folded TM topology. We put forward x-Folded TM as an efficient topology in interconnection networks. Then, the proposed partitioning scheme applied by dividing x-Folded TM topology into three critical partitions. To evaluate its performance, adaptive and deterministic routing algorithms used under different traffic patterns. The obtained results reveal that the average delay at x-Folded TM network is obviously lower than other topologies. In contrast, network throughput for x-Folded TM is higher than Torus and TM. Consequently, the relatively large improved performance for x-Folded TM topology compared other topologies.
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References
Borhani, A.H., Movaghar, A., Cole, R.G.: A new deterministic fault tolerant wormhole routing strategy for k-ary 2-cubes. In: IEEE International Conference on Computational Intelligence and Computing Research (ICCIC), pp. 1–7 (2010)
Ma, S., Enright Jerger, N., Wang, Z.: DBAR: An efficient routing algorithm to support multiple concurrent applications in networks-on-chip. In: 38th Annual International Symposium on Computer Architecture (ISCA 11), pp. 413–424. ACM, New York (2011)
Seiculescu, C., Murali, S., Benini, L., Micheli, G.D.: A method to remove deadlocks in networks-on-chips with wormhole flow control. In: Design, Automation Test in Europe Conference Exhibition (DATE), pp. 1625–1628 (2010)
Su, K.M., Yum, K.H.: Simple and effective adaptive routing algorithms in multi-layer wormhole networks. In: IEEE International Performance, Computing and Communications Conference (IPCCC), pp. 176–184 (2008)
Xiang, D., Zhang, Y., Pan, Y.: Practical deadlock-free fault-tolerant routing in meshes based on the planar network fault model. IEEE Trans. Comput. 58(5), 620–633 (2009)
Feng, C., Li, J., Lu, Z., Jantsch, A., Zhang, M.: Evaluation of deflection routing on various NoC topologies. In: IEEE 9th International Conference on ASIC (ASICON), pp. 163–166 (2011)
Duato, J., Yalamanchili, S., Ni, L.M.: Interconnection Networks: An Engineering Approach. Morgan Kaufmann, Burlington (2003)
Chao, H.L., Chen, Y.R., Tung, S.Y., Hsiung, P.A., Chen, S.J.: Congestionaware scheduling for NoC-based reconfigurable systems. In: Design, Automation Test in Europe Conference Exhibition (DATE), pp. 1561–1566 (2012)
Somasundaram, K., Plosila, J., Viswanathan, N.: Deadlock free routing algorithm for minimizing congestion in a hamiltonian connected recursive 3dNoCs. Microelectron. J. 45(8), 989–1000 (2014)
Camara, J.M., et al.: Twisted torus topologies for enhanced interconnection networks. IEEE Trans. Parallel Distrib. Syst. 21(12), 1765–1778 (2010)
Liu, Y., Li, C., Han, J.: RTTM: a new hierarchical interconnection network for massively parallel computing. In: Zhang, W., Chen, Z., Douglas, C.C., Tong, W. (eds.) HPCA 2009. LNCS, vol. 5938, pp. 264–271. Springer, Heidelberg (2010). https://doi.org/10.1007/978-3-642-11842-5_36
Yu-hang, L., Ming-fa, Z., Jue, W., Li-min, X., Tao, G.: Xtorus: An extended torus topology for on-chip massive data communication. In: IEEE 26th International Parallel and Distributed Processing Symposium Workshops PhD Forum (IPDPSW), pp. 2061–2068 (2012)
Tatas, K., Siozios, K., Soudris, D., Jantsch, A.: Designing 2D and 3D Network-on-Chip Architectures. Springer, New York (2014). https://doi.org/10.1007/978-1-4614-4274-5
Wang, K., Zhao, L., Gu, H., Yu, X., Wu, G., Cai, J.: ADON: a scalable AWG-based topology for datacenter optical network. Opt. Quant. Electron. 47(8), 2541–2554 (2015)
Wang, X., Xiang, D., Yu, Z.: TM: a new and simple topology for interconnection networks. J. Supercomput. 66(1), 514–538 (2013)
Moudi, M., Othman, M.: Mathematical modelling for TM topology under uniform and hotspot traffic patterns. Automatika 58(1), 88–96 (2017)
Moudi, M., Othman, M., Lun, K.Y., Abdul Rahiman, A.R.: X-Folded TM: an efficient topology for interconnection networks. J. Netw. Comput. Appl. 73, 27–34 (2016)
Jiang, N., et al.: A detailed and flexible cycle-accurate Network-on-Chip simulator. In: IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), pp. 86–96 (2013)
Ni, L.M., McKinley, P.K.: A survey of wormhole routing techniques in direct networks. IEEE Comput. 26(2), 62–76 (1993)
Acknowledgment
This research was supported by the Universiti Putra Malaysia under High Impact Putra Grant: UPM/700-2/1/GPB/2017/9557900.
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Moudi, M., Othman, M. (2019). A Partitioning Scheme to Route X-Folded TM Topology Deadlock-Free. In: Grandinetti, L., Mirtaheri, S., Shahbazian, R. (eds) High-Performance Computing and Big Data Analysis. TopHPC 2019. Communications in Computer and Information Science, vol 891. Springer, Cham. https://doi.org/10.1007/978-3-030-33495-6_19
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DOI: https://doi.org/10.1007/978-3-030-33495-6_19
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