Abstract
This chapter presents the use of Monolithic 3D technologies to overcome the interconnect barrier between the processing logic and the high-speed memory—the so-called “Memory Wall.” This barrier is even more limiting for AI applications in which massive amounts of data need to go through relatively simple processing. The 2018 3DVLSI DARPA program is focused on addressing this challenge. Alternative technologies are covered in which layers of logic and layers of memory can be integrated to construct efficient AI systems. This chapter also describes the use of 3D technology to enable ultra large-scale integration with efficient across-system interconnecting technologies.
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Or-Bach, Z. (2020). A 1000× Improvement of the Processor-Memory Gap. In: Murmann, B., Hoefflinger, B. (eds) NANO-CHIPS 2030. The Frontiers Collection. Springer, Cham. https://doi.org/10.1007/978-3-030-18338-7_15
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DOI: https://doi.org/10.1007/978-3-030-18338-7_15
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