Abstract
Image acquisition system is responsible for collecting and filtering the image data to reduce the size of data processing. The efficiency of image acquisition will directly affect our ability to process image information timely and accurately. This paper proposes a hardware scheme for high-speed image acquisition system. The high performance of FPGA is fully taken to realize the logic control of this system. The principle, function and design methods of each sub-module have been described in detail.
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Chen, J., Xue, R., Wang, Q. (2014). The Design of a High-Speed Image Acquisition System. In: Zhong, S. (eds) Proceedings of the 2012 International Conference on Cybernetics and Informatics. Lecture Notes in Electrical Engineering, vol 163. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-3872-4_146
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DOI: https://doi.org/10.1007/978-1-4614-3872-4_146
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