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Part of the book series: Analog Circuits and Signal Processing ((ACSP))

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Abstract

In this chapter, theoretical fundamentals regarding the main performances of the transimpedance amplifier, such as the optimum bandwidth owing to noise—ISI trade-off, its derivation from the selected topology—shunt-feedback TIA—and the transimpedance limit is presented. A comparison with others topologies—current-mode, common-gate and regulated cascade—and an introduction to input dynamic range extension techniques is also included. Next, the proposed design implemented in a standard 0.18 lm CMOS technology suitable for low-cost applications such as POF is explained. The scalability of our proposal for CMOS technologies with shorter channel length (90 nm) is demonstrated. Finally, the verification of both prototypes is presented.

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Notes

  1. 1.

    The sub index indicates that it is calculated from a dominant-pole approximation, i.e., assuming an ideal voltage amplifier.

  2. 2.

    The sub index indicates that it is calculated from a second order system.

  3. 3.

    EAGLE Cadsoft online. http://www.cadsoft.de/.

  4. 4.

    LeitOn Company. http://www.leiton.de/index.html.

  5. 5.

    Rogers Corporation 2010

  6. 6.

    Hamamatsu Photonics. http://www.hamamatsu.com/.

  7. 7.

    Hamamatsu Photonics Si PIN Photodiode, S5971, S5972, S5973 series, Solid State Division. http://jp.hamamatsu.com/resources/products/ssd/pdf/s5971_etc_kpin1025e06.pdf.

  8. 8.

    Thorlabs Inc. http://www.thorlabs.com.

  9. 9.

    Mitsubishi Photodiodes, PD7XX7 Series. www.mitsubishielectric-mesh.com/products/pdf/pd7xx7.pdf.

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Correspondence to Francisco Aznar .

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Aznar, F., Celma, S., Calvo, B. (2013). Transimpedance Amplifier. In: CMOS Receiver Front-ends for Gigabit Short-Range Optical Communications. Analog Circuits and Signal Processing. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-3464-1_3

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  • DOI: https://doi.org/10.1007/978-1-4614-3464-1_3

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