A 2.4-GHz Narrowband MEMS-Based Radio

Abstract

This chapter presents an innovative wireless transceiver architecture that rely on MEMS components to achieve further miniaturization and significant power dissipation reduction compared to low-power radios targeting LDR to MDR applications. It is shown in particular how the limitations of MEMS devices can be waived at the architectural level and how their combination can lead to innovative concepts preserving or even surpassing the performances of current mainstream optimized solutions. Besides the architectural aspects, the chapter also focuses on the design of some ultra-low-power and MEMS-specific circuits and reports measurement results of the complete system. The synthesizer, which is based on a low-phase-noise fixed-frequency BAW DCO and a variable IF LO obtained by fractional division from the RF carrier, achieves a phase noise of − 113 dBc/Hz at 3 MHz. To correct for its ageing and thermal drift, the BAW DCO can intermittently be phase locked to a 3-μ A, ± 5-ppm, 32- K Hz reference, which is obtained after temperature-dependent fractional division of the signal of a 1- M Hz silicon resonator so as to compensate the non-idealities of the latter (frequency tolerance, large thermal drift). An all-digital PLL implementation guaranties a nearly immediate synthesizer settling when returning from an idle period, owing to the memorization of the previous lock conditions eliminating a multi-MHz XTAL and its associated start-up time. A sensitivity of 87 dBm was obtained in receive mode at 100 kb/s for a global consumption of 6 m A. The transmitter demonstrates a high-data-rate quasi-direct 1-point modulation capability with the generation of a 4-dBm, 1-Mbps, GFSK signal with an overall current of 20 m A. Both the receiver and transmitter further take advantage of BAW filters to implement interferers, image, and spurious rejection.