Low Power and Reliable SRAM Memory Cell and Array Design

1. Front Matter

   Pages i-xi

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2. Introduction

   • Koichiro Ishibashi

   Pages 1-4

3. Fundamentals of SRAM Memory Cell

   • Kenichi Osada

   Pages 5-10

4. Electrical Stability (Read and Write Operations)

   • Masanao Yamaoka, Yasumasa Tsukamoto

   Pages 11-24

5. Low Power Memory Cell Design Technique

   • Kenichi Osada, Masanao Yamaoka

   Pages 25-41

6. Low-Power Array Design Techniques

   • Koji Nii, Masanao Yamaoka, Kenichi Osada

   Pages 43-88

7. Reliable Memory Cell Design for Environmental Radiation-Induced Failures in SRAM

   • Eishi Ibe, Kenichi Osada

   Pages 89-124

8. Future Technologies

   • Koji Nii, Masanao Yamaoka

   Pages 125-138

9. Back Matter

   Pages 139-143

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Success in the development of recent advanced semiconductor device technologies is due to the success of SRAM memory cells. This book addresses various issues for designing SRAM memory cells for advanced CMOS technology. To study LSI design, SRAM cell design is the best materials subject because issues about variability, leakage and reliability have to be taken into account for the design.

• CMOS LSI
• Memory cell
• Reliability
• SRAM
• Study

• The University of Electro-Communications, Tokyo, Japan

  Koichiro Ishibashi

• Hitachi Ltd., Kokubunji-shi, Tokyo, Japan

  Kenichi Osada

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