Object Recognition System-on-Chip Using the Support Vector Machines
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Volume 2005, issue 7, December 2005
14 articles in this issue
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Towards Low-Power On-chip Auditory Processing
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Perception SoC Based on an Ultrasonic Array of Sensors: Efficient DSP Core Implementation and Subsequent Experimental Results
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A Low-Power Integrated Smart Sensor with on-Chip Real-Time Image Processing Capabilities
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FPGA-Based Configurable Systolic Architecture for Window-Based Image Processing
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Managing Algorithmic Skeleton Nesting Requirements in Realistic Image Processing Applications: The Case of the SKiPPER-II Parallel Programming Environment's Operating Model
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Automatic Hardware Implementation Tool for a Discrete Adaboost-Based Decision Algorithm
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