Volume 15, Issue 2 | Design Automation for Embedded Systems

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Volume 15, Issue 2

June 2011

Networks-on-chips: Design Flows and Case Studies

Issue Editors:

Kees Goossens,
Radu Marculescu

5 articles in this issue

Special Issue on Networks-on-Chips: Design Flows and Case Studies
Kees Goossens
Radu Marculescu
Editorial Introduction Open access 03 May 2011 Pages: 87 - 88
Communication-aware VFI partitioning for GALS-based networks-on-chip
Dongkun Shin
Woojoong Kim
Tae Hee Han
OriginalPaper 10 March 2011 Pages: 89 - 109
A scalable built-in self-recovery (BISR) VLSI architecture and design methodology for 2D-mesh based on-chip networks
Kun-Chih Chen
Shu-Yen Lin
An-Yeu (Andy) Wu
OriginalPaper 05 April 2011 Pages: 111 - 132
Application driven network-on-chip architecture exploration & refinement for a complex SoC
Jean-Jacques Lecler
Gilles Baillieu
OriginalPaper Open access 07 April 2011 Pages: 133 - 158
A quantitative evaluation of a Network on Chip design flow for multi-core consumer multimedia applications
Andreas Hansson
Kees Goossens
OriginalPaper Open access 30 March 2011 Pages: 159 - 190