Abstract
This paper describes a simple offset error (OEC) and two gain error (GEC) correction methods for an analog–digital converter (ADC), which use a dedicated sample-and-hold (S/H) circuit. These three methods are specifically proposed for switched- capacitor (SC) S/H circuits. In these methods, few unit capacitors of main S/H-capacitor are separated for correction. OEC method and one of GEC method uses bottom-plate sampling to correct the sampled voltage. The second GEC method uses charge sharing method between capacitors.
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Keskin, M., Chew, M. Gain and offset correction methods for analog-to-digital converters. Analog Integr Circ Sig Process 68, 357–360 (2011). https://doi.org/10.1007/s10470-011-9626-5
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DOI: https://doi.org/10.1007/s10470-011-9626-5