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Graphene Nanoelectronics pp 51–91Cite as

Graphene Transistors

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Abstract

This chapter begins with an overview of digital and analog semiconductor technology. Following this, tradeoffs between various device designs are discussed for Si FETs. Analog (RF) applications require a low access resistance and small mobility degradation from dielectrics—the former is discussed in detail in this chapter, while the latter is the topic of Chap. 9. Digital FETs need certain criteria to be met—foremost amongst them being bandgap opening and complementary operation. Both these topics are discussed in detail in this chapter. Geometrical scaling of graphene FETs—including width and length scaling—is discussed along with implications for edge-scattering and methods to reduce it. Circuit implementations of graphene FETs are looked into including mixers, frequency multipliers, and inverters. A few non-FET structures are also looked at such as the Klein tunneling transistor.

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  1. Nanotechnology Research Center, Georgia Institute of Technology, Atlanta, GA, USA

    Raghu Murali

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    Raghu Murali

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Murali, R. (2012). Graphene Transistors. In: Murali, R. (eds) Graphene Nanoelectronics. Springer, Boston, MA. https://doi.org/10.1007/978-1-4614-0548-1_3

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