Abstract
Transaction level models (TLMs) can be constructed at different levels of abstraction, denoted as untimed (UT), cycle-approximate (CX), and cycle accurate (CA) in this contribution. The choice of a level has an impact on simulation accuracy and performance and makes a level suitable for specific use cases, e.g. virtual prototyping, architectural exploration, and verification. Whereas the untimed and cycle-accurate levels have a relatively precise definition, cycle-approximate spans a wide space of modelling alternatives between UT and CA, which makes it a class of levels rather than a single level. In this contribution we review these modelling alternatives in the context of SystemC and with focus on bus models, provide quantitative measurements on major alternatives, and propose a CX modelling level that allows to obtain almost cycle accuracy and a simulation performance significantly above CA models.
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Radetzki, M., Khaligh, R.S. (2008). On Construction of Cycle Approximate Bus TLMs. In: Villar, E. (eds) Embedded Systems Specification and Design Languages. Lecture Notes in Electrical Engineering, vol 10. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-8297-9_3
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DOI: https://doi.org/10.1007/978-1-4020-8297-9_3
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