Abstract
This paper presents a theoretical study of a model of parallel computations called Parallel Alternating-Direction Access Machine (Padam). Padam is an abstraction of the multiprocessor computers Adena /adenart and a prototype architecture usc/omp. The main feature of Padam is the organization of access to the global memory:
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(1)
the memory modules are arranged as a 2-dimensional array,
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(2)
each processor is assigned to a row and a column,
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(3)
the processors switch synchronously between row and column access modes, and can access any of the assigned modules in each mode without conflicts.
Since the padam processors have such a restricted access to the partially shared memory, developing tools to enhance flexibility of access to the memory is important. The paper concentrates on these issues.
Work partially supported by EC Cooperative Action IC-1000 (project ALTEC: Algorithms for Future Technologies) and a research grant from Matsushita Electric Industrial Company Ltd.
Partially supported by DFG-Graduiertenkolleg “Parallele Rechnernetzwerke in der Produktionstechnik”, ME 872/4-1 and by DFG-Sonderforschungsbereich 376 “Massive Parallelität: Algorithmen, Entwurfsmethoden, Anwendungen”.
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© 1996 Springer-Verlag Berlin Heidelberg
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Chlebus, B.S., Czumaj, A., Gasieniec, L., Kowaluk, M., Plandowski, W. (1996). Parallel Alternating-Direction Access Machine. In: Penczek, W., Szałas, A. (eds) Mathematical Foundations of Computer Science 1996. MFCS 1996. Lecture Notes in Computer Science, vol 1113. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-61550-4_154
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DOI: https://doi.org/10.1007/3-540-61550-4_154
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