Skip to main content

FPGA-Based Emulation: Industrial and Custom Prototyping Solutions

  • Conference paper
  • First Online:
Book cover Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing (FPL 2000)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1896))

Included in the following conference series:

Abstract

The given paper presents the state of the art in the FPGA-based logic emulation. The analysis of the existing emulation solutions is performed according to the following classification: (1) large emulation systems (Quickturn [26], Ikos [16], MentorGraphics [21]); (2) semi-custom rapid prototyping boards (Aptix [3], Simutech [24]); (3) custom prototyping solutions (Transmogrifier2 [20], Weaver [6], Replica [18], FPGA vendors demonstration and prototyping boards [31], [2], microprocessor-based boards, etc.). Each system is exposed in terms of its capacity, architecture, used FPGAs and performance.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 84.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Altera Device Data Book, Apex 20K Programmable Logic Device Family Data Sheet, 1999.

    Google Scholar 

  2. Altera Development Boards, http://www.altera.com/html/mega/boards.html

  3. Aptix Home Page, http://www.aptix.com/.

  4. J. Babb, R. Tessier, M. Dahl, S.Z. Hanono, D. M. Hoki, A. Agrawal, ”Logic Emulation with Virtual Wires”, IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems 16/6 (1997): 609–626.

    Article  Google Scholar 

  5. V. Bhatia, S. Shtil, ”Rapid Prototyping Technology Accelerates Software Development for Complex Network Systems”, Proc. RSP (1998): 113–115.

    Google Scholar 

  6. T. Buchholz, G. Haug, U. Kebschull, G. Koch, W. Rosenstiel, ”Behavioral Emulation of Synthesized RT-level Descriptions Using VLIW Architectures”, Proc. RSP (1998): 70–75.

    Google Scholar 

  7. M. Butts, J. Batcheller, J. Varghese, ”An Efficient Logic Emulation System”, Proc. ICCD (1992): 138–141.

    Google Scholar 

  8. M. Courtoy, ”Rapid System Prototyping for Real-Time Design Validation”, Proc. RSP (1998): 108–112.

    Google Scholar 

  9. J. P. David, J. D. Legat, ”A 400Kgates *Mbytes SRAM multi-FPGA PCI system”, Proc. Intl. Workshop on Logic and Architecture Synthesis (1997): 113–117.

    Google Scholar 

  10. Design & Reuse Design Platform Catalog, http://www.design-reuse.com/PROTO_PLATFORM/proto_platform_l.html.

  11. Europe Technologies EVM 40400 Application Notes, http://www.europe-technologies.com/evm40400_appnotes.htm.

  12. T. Fujimoto, T. Kambe, ”VLSI Design and System Level verification for the Mini-Disk”, Proc. 33rd Design Automation Conf. (1996): 491–496.

    Google Scholar 

  13. S. Guccione, ”List of FPGA-based Computing Machines”, http://www.io.com//guccione/HW_list.html (1983).

  14. K. Harbich, J. Stohmann, E. Barke, L. Schwoerer, ”A Case Study: Logic Emulation — Pitfalls and Solutions”, Proc. RSP’99 (1999): 160–163.

    Google Scholar 

  15. S. Hauck, ”The Roles of FPGAs in Reprogrammable Systems”, Proc. of the IEEE, Vol. 86, No. 4 (1998): 615–639.

    Article  Google Scholar 

  16. IKOS Home Page, http://www.ikos.com/

  17. U. Kebschull, G. Koch, W. Rosenstiel, ”The WEAVER Prototyping Environment for Hardware/Software Co-Design and Co-Debugging”, Proc. DATE, Designer Track (1998): 237–242.

    Google Scholar 

  18. A. Krischbaum, S. Ortmann, M. Glesner, ”Rapid Prototyping of a Co-Processor based Engine Knock Detection System”, Proc. RSP’98 (1998): 124–129.

    Google Scholar 

  19. P. Kuntz, ”Proprietary FPGA Prototyping Boards at STMicroelectronics”, Proc. Sixth Training on SoC Design Using Design and Prototyping Platforms, April 19–20, 2000, Grenoble, France.

    Google Scholar 

  20. D. M. Lewis, D. R. Galloway, M. Ierssel, J. Rose, P. Chow, ”The Transmogrifier-2: A 1 Million Gate Rapid Prototyping System”, Proc. ACM/SIGDA Int. Symp. on Field Programmable Gate Arrays (1997): 53–61.

    Google Scholar 

  21. Mentor Graphics Accelerated Verification/ Emulation page, http://www.mentorg.nl/av/index.html

  22. Velocity: Rapid Silicon Prototyping System, http://www-us.semiconductors.philips.com/technology/velocity.

  23. SIDSA ARM Emulation Boards, http://www.sidsa.com/ARM.htm.

  24. Simutech Home Page, http://www.simutech.com/.

  25. G. Stoler, ”Validation of Complex designs by Means of Prototyping”, Fifth Training on Validation of Complex Systems Through Hardware Prototyping, Training Materials, Grenoble (2000).

    Google Scholar 

  26. Quickturn Home Page, http://www.quickturn.com.

  27. R. Tessier, J. Babb, M. Dahl, S.Z. Hanono, A. Agrawal, ”The Virtual Wires Emulation System: A Gate-Efficient ASIC Prototyping Environment”, Proc. ACM/SIGDA Int. Symp. on Field Programmable Gate Arrays (1994).

    Google Scholar 

  28. H. Verheyen, ”Emulators ease design prototyping”, Electronic Products, Jan. 1996.

    Google Scholar 

  29. ”Virtex-E Field Programmable Gate Arrays Data Sheet, 1999”

    Google Scholar 

  30. S. Walters, ”Computer-Aided Prototyping for ASIC-based systems”, IEEE Design&Test of Computers, No 6 (1991): 4–10.

    Google Scholar 

  31. Xilinx Prototyping Platforms, http://www.xilinx.com/products/protoboards/protoboards.htm.

  32. Xilinx Prototype Platforms User Guide for Virtex and Virtex-E Series FPGAs, Xilinx Data Sheet DS020, December 1999.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2000 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Krupnova, H., Saucier, G. (2000). FPGA-Based Emulation: Industrial and Custom Prototyping Solutions. In: Hartenstein, R.W., Grünbacher, H. (eds) Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing. FPL 2000. Lecture Notes in Computer Science, vol 1896. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44614-1_8

Download citation

  • DOI: https://doi.org/10.1007/3-540-44614-1_8

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-67899-1

  • Online ISBN: 978-3-540-44614-9

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics