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The >S<puter: Introducing a novel concept for dispatching instructions using reconfigurable hardware

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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1482))

Abstract

A novel model for executing programs inside microprocessors is introduced, based on the integration of programmable structures in the dispatch and execution unit. These structures enable the highest degree of instruction parallelism while maintaining the strong sequence of results. The new model is introduced but not limited to register-based processors, while the requested compiler technology proves to be the same as for superscalar processors.

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References

  1. James E. Smith, Gurindar S. Sohi, “The Microarchitecture of Superscalar Processors”, Invited Paper in Proceedings of the IEEE, Special Issue on Microprocessors, Vol. 83 (12), p. 1609.. 1624, 1995.

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  2. W. Hwu Wen-Mei et. al., “Compiler Technology for Future Microprocessor”,. Invited Paper in Proceedings of the IEEE, Special Issue on Microprocessors, Vol. 83 (12), p. 1625.. 1640, 1995.

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  3. C. Siemers, D.P.F. Möller, “The >S<puter: A Novel Microarchitecturemodel for the Execution of Instructions inside Processors”, in: Xu De, K.-E. Gro\pietsch, Ch. Steigner (Eds.): Proceedings of the Second Sino-German Workshop on Advanced Parallel Processing Technologies APPT '97, Koblenz, September 1997, p. 75.. 82. Fölbach Verlag, Koblenz, 1997.

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  4. R.W. Hartenstein, J. Becker, R. Kress, “Custom Computing Machines vs. Hardware/Software Co-Design: From a Globalized Point of View”, 6th Int. Workshop on Field Programmable Logic and Appl, FPL'96, Darmstadt, Sept. 1996, Lecture Notes in Computer Science 1142, Springer 1996.

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Reiner W. Hartenstein Andres Keevallik

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© 1998 Springer-Verlag Berlin Heidelberg

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Siemers, C., Möller, D.P.F. (1998). The >S<puter: Introducing a novel concept for dispatching instructions using reconfigurable hardware. In: Hartenstein, R.W., Keevallik, A. (eds) Field-Programmable Logic and Applications From FPGAs to Computing Paradigm. FPL 1998. Lecture Notes in Computer Science, vol 1482. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0055291

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  • DOI: https://doi.org/10.1007/BFb0055291

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-64948-9

  • Online ISBN: 978-3-540-68066-6

  • eBook Packages: Springer Book Archive

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