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Introduction

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Design, Analysis and Test of Logic Circuits Under Uncertainty

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 115))

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Abstract

Integrated circuit (IC) chips, which lie at the heart of modern computers, are subject to silicon-surface imperfections, contaminants, wire shorts and other defects. Over time, IC technology scaling has heightened device sensitivity to a different kind of error, known as a soft, or transient errors. Soft errors are caused by external noise or radiation that temporarily affects circuit behavior without permanently damaging the hardware. With the advent of nanoscale computing, soft errors are beginning to affect not only memory but also logic. Here, we review the technology trends that lead to increased vulnerability to soft errors and other sorts of uncertainty in circuit behavior. We also provide an overview of previous work on soft-error rate (SER) analysis, fault-tolerant design, soft-error rate testing, and probabilistic circuit analysis.

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Authors and Affiliations

  1. Department of Biological Sciences, Columbia University, 1212 Amsterdam Ave, New York, NY, 10027-7003, USA

    Smita Krishnaswamy

  2. CSE Division, Department of EECS, University of Michigan, 2260 Hayward Ave, Ann Arbor, MI, 48109-2121, USA

    Igor L. Markov & John P. Hayes

Authors
  1. Smita Krishnaswamy
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  2. Igor L. Markov
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  3. John P. Hayes
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Correspondence to Smita Krishnaswamy .

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Krishnaswamy, S., Markov, I.L., Hayes, J.P. (2013). Introduction. In: Design, Analysis and Test of Logic Circuits Under Uncertainty. Lecture Notes in Electrical Engineering, vol 115. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-9644-9_1

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  • DOI: https://doi.org/10.1007/978-90-481-9644-9_1

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  • Print ISBN: 978-90-481-9643-2

  • Online ISBN: 978-90-481-9644-9

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