International Conference on High-Performance Embedded Architectures and Compilers

HiPEAC 2009: High Performance Embedded Architectures and Compilers pp 65-79

Integrated Modulo Scheduling for Clustered VLIW Architectures

  • Mattias V. Eriksson
  • Christoph W. Kessler
Conference paper

DOI: 10.1007/978-3-540-92990-1_7

Volume 5409 of the book series Lecture Notes in Computer Science (LNCS)
Cite this paper as:
Eriksson M.V., Kessler C.W. (2009) Integrated Modulo Scheduling for Clustered VLIW Architectures. In: Seznec A., Emer J., O’Boyle M., Martonosi M., Ungerer T. (eds) High Performance Embedded Architectures and Compilers. HiPEAC 2009. Lecture Notes in Computer Science, vol 5409. Springer, Berlin, Heidelberg

Abstract

We solve the problem of integrating modulo scheduling with instruction selection (including cluster assignment), instruction scheduling and register allocation, with optimal spill code generation and scheduling. Our method is based on integer linear programming. We prove that our algorithm delivers optimal results in finite time for a certain class of architectures. We believe that these results are interesting both from a theoretical point of view and as a reference point when devising heuristic methods.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2009

Authors and Affiliations

  • Mattias V. Eriksson
    • 1
  • Christoph W. Kessler
    • 1
  1. 1.PELAB, Dept. of Computer and Information ScienceLinköping universityLinköpingSweden