Advanced Research Working Conference on Correct Hardware Design and Verification Methods

CHARME 2003: Correct Hardware Design and Verification Methods pp 348-362

Convergence Testing in Term-Level Bounded Model Checking

  • Randal E. Bryant
  • Shuvendu K. Lahiri
  • Sanjit A. Seshia
Conference paper

DOI: 10.1007/978-3-540-39724-3_31

Volume 2860 of the book series Lecture Notes in Computer Science (LNCS)

Abstract

We consider the problem of bounded model checking of systems expressed in a decidable fragment of first-order logic. While model checking is not guaranteed to terminate for an arbitrary system, it converges for many practical examples, including pipelined processors. We give a new formal definition of convergence that generalizes previously stated criteria. We also give a sound semi-decision procedure to check this criterion based on a translation to quantified separation logic. Preliminary results on simple pipeline processor models are presented.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Randal E. Bryant
    • 1
  • Shuvendu K. Lahiri
    • 1
  • Sanjit A. Seshia
    • 1
  1. 1.School of Computer Science & Electrical and Computer Engineering DepartmentCarnegie Mellon UniversityPittsburghUSA