Abstract
SystemC is the de facto standard language for electronic system level design and simulation. SystemC simulations may contain nondeterminism caused by dependencies on the process execution order (PEO) due to data dependencies of SystemC logical processes (LP) within delta-cycles. In practice, often this is not an issue, since simulation execution appears to be deterministic due to deterministic SystemC scheduler implementations.However, to satisfy the increasing need for simulation speed, parallel SystemC engines are being researched: With no fixed strict total order among LPs executed in parallel, nondeterministic behavior is more likely to surface and more difficult to debug, threatening the viability to use simulation for debugging use-cases.This work presents a new method to test for nondeterminism: Anomalies are detected by running a simulation twice in sequential simulation mode while systematically varying the PEO, and without the need for source code analysis. Feasibility is demonstrated with several case studies.
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References
Blanc, N., Kroening, D.: Race analysis for SystemC using model checking. In: Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design, ICCAD’08, San Jose, pp. 356–363. IEEE Press, Piscataway (2008)
Chen, W., Domer, R.: An optimizing compiler for out-of-order parallel ESL simulation exploiting instance isolation. In: Proceedings of the 17th Asia and South Pacific Design Automation Conference (ASP-DAC), Sydney, pp. 461–466 (2012)
Cimatti, A., Micheli, A., Narasamdya, I., Roveri, M.: Verifying SystemC: a software model checking approach. In: Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design, FMCAD’10, Austin, FMCAD Inc. (2010)
Cockx, J., Denolf, K., Vanhoof, B., Stahl, R.: SPRINT: a tool to generate concurrent transaction-level models from sequential code. EURASIP J. Appl. Signal Process. 2007(1), 213–213 (2007) http://dl.acm.org/citation.cfm?id=1289174
Dömer, R., Chen, W., Han, X., Gerstlauer, A.: Multi-core parallel simulation of system-level description languages. In: Proceedings of the 16th Asia and South Pacific Design Automation Conference, ASPDAC’11, Yokohama. IEEE Press, Piscataway (2011)
Godefroid, P.: Software model checking: the VeriSoft approach. Form. Methods Syst. Des. 26, 77–101 (2005)
Große, D., Kühne, U., Drechsler, R.: HW/SW co-verification of embedded systems using bounded model checking. In: Proceedings of the 16th ACM Great Lakes Symposium on VLSI, GLSVLSI’06, Philadelphia, pp. 43–48. ACM, New York (2006)
Grotker, T.: System Design with SystemC. Kluwer, Norwell (2002)
Helmstetter, C., Maraninchi, F., Contoz, L.M., Moy, M.: Automatic generation of schedulings for improving the test coverage of systems-on-a-chip. In: Proceedings of the Formal Methods in Computer Aided Design, FMCAD’06, San Jose, pp. 171–178. IEEE Computer Society, Washington, DC (2006)
Herrera, F., Villar, E.: Extension of the SystemC kernel for simulation coverage. In: Forum on Specification and Design Languages, FDL’06, pp. 161–168 (2006)
IEEE Standard SystemC Language Reference Manual. IEEE Std 1666–2005 pp.0–1423 (2006). doi: 10.1109/IEEESTD.2006.99475 http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1617814&isnumber=33906
Indexer Benchmark: http://trac.assembla.com/scrv/browser/examples/rvs/indexer/indexer.cpp. Accessed 2011
Lu, S., Park, S., Seo, E., Zhou, Y.: Learning from mistakes: a comprehensive study on real world concurrency bug characteristics. In: Proceedings of the 13th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS XIII, Seattle, pp. 329–339. ACM, New York (2008)
Magnusson, P.S., Christensson, M., Eskilson, J., Forsgren, D., Hallberg, G., Hogberg, J., Larsson, F., Moestedt, A., Werner, B.: Simics: a full system simulation platform. Computer 35(2), 50–58 (2002)
Mello, A., Maia, I., Greiner, A., Pecheux, F.: Parallel simulation of SystemC TLM 2.0 compliant MPSoC on SMP workstations. In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE’10, pp. 606–609, Leuven. European Design and Automation Association (2010)
Musuvathi, M., Qadeer, S., Ball, T., Basler, G., Nainar, P.A., Neamtiu, I.: Finding and reproducing Heisenbugs in concurrent programs. In: Proceedings of the 8th USENIX Conference on Operating Systems Design and Implementation, OSDI’08, Berkeley, pp. 267–280. USENIX Association (2008)
Nanjundappa, M., Patel, H.D., Jose, B.A., Shukla, S.K.: SCGPSim: a fast SystemC simulator on GPUs. In: Proceedings of the 2010 Asia and South Pacific Design Automation Conference, ASPDAC’10, Taipei. IEEE Press, Piscataway (2010)
Open SystemC Initiative: OSCI TLM-2.0 Language Reference Manual. http://www.accellera.org/downloads/standards/systemc (July 2009)
Robert E. Lantz: Parallel: Scalability and performance for large system simulation. Ph.D. thesis, Computer Systems Laboratory, Stanford University (June 2007)
Schumacher, C., Leupers, R., Petras, D., Hoffmann, A.: parSC: synchronous parallel SystemC simulation on multi-core host architectures. In: Proceedings of the 8th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES/ISSS’10, Scottsdale, pp. 241–246. ACM, New York (2010)
SCOOT, a tool for the static analysis of SystemC http://www.cprover.org/scoot. Accessed 2011
Sen, A., Ogale, V., Abadir, M.S.: Predictive runtime verification of multi-processor SoCs in SystemC. In: Proceedings of the 45th Annual Design Automation Conference, DAC’08, Anaheim, pp. 948–953. ACM, New York (2008)
SoClib, an open platform for virtual prototyping of multi-processor systems on chip. http://www.soclib.fr. Accessed 2011
SoClib Appliance. http://www.soclib.fr/appliance/soclib-vm-latest.zip
Synopsys Inc.: Synopsys processor designer. http://www.synopsys.com/Systems/BlockDesign/ProcessorDev/Pages/default.aspx
The GNU Linker ld.: http://sourceware.org/binutils/docs/ld/Options.html. Accessed 2011
Acknowledgements
This work has been supported by the German excellence cluster UMIC and the European FP7 project EURETILE.
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Weinstock, J.H., Schumacher, C., Leupers, R., Ascheid, G. (2014). SCandal: SystemC Analysis for Nondeterminism Anomalies. In: Haase, J. (eds) Models, Methods, and Tools for Complex Chip Design. Lecture Notes in Electrical Engineering, vol 265. Springer, Cham. https://doi.org/10.1007/978-3-319-01418-0_5
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DOI: https://doi.org/10.1007/978-3-319-01418-0_5
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