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Statistical Distribution of Defect Parameters

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Bias Temperature Instability for Devices and Circuits

Abstract

The statistics of bias temperature instability (BTI) is derived within the “defect-centric” paradigm of device degradation. This paradigm is first briefly reviewed, drawing on similarities between BTI and random telegraph noise (RTN). The impact of a single trap on FET threshold voltage V th is then shown to follow an exponential distribution with the expectation value η. The properties of η, such as its area and gate oxide thickness dependences, are discussed. The statistics of multiple defects is then developed, assuming (1) the single-trap exponential distribution and (2) a Poisson distribution of the number of traps in each device. The properties of the resulting time-dependent total ΔV th statistics and its moments are then treated. Finally, the combined time-dependent and time-zero statistics of the total threshold voltage V th is discussed, together with its properties and a brief example of its implications for circuit performance metrics.

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Acknowledgments

The authors gratefully acknowledge the invaluable input of Philippe Roussel for statistics; Prof. Tibor Grasser for general discussions and trap kinetics in particular; Prof. Guido Groeseneken for discussion and support; and Prof. Francky Catthoor, Dr. Praveen Raghavan, and Halil Kukner for a circuit designer’s perspective.

This work was performed as part of imec’s Core Partner Program. It has been in part supported by the European Commission under the 7th Framework Programme (collaborative project MORDRED, contract No. 261868).

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Authors and Affiliations

  1. Imec, Kapeldreef 75, 3001, Leuven, Belgium

    B. Kaczer, M. Toledano-Luque, J. Franco & P. Weckx

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  1. B. Kaczer
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  2. M. Toledano-Luque
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Correspondence to B. Kaczer .

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  1. Institute for Microelectronics, Technische Universität Wien, Wien, Austria

    Tibor Grasser

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Kaczer, B., Toledano-Luque, M., Franco, J., Weckx, P. (2014). Statistical Distribution of Defect Parameters. In: Grasser, T. (eds) Bias Temperature Instability for Devices and Circuits. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-7909-3_7

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  • DOI: https://doi.org/10.1007/978-1-4614-7909-3_7

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