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Nanometer Variation-Tolerant SRAM pp 49–95Cite as

Variation-Tolerant SRAM Write and Read Assist Techniques

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Abstract

The objective of assist techniques is to improve the robustness and stability of SRAM at low voltage operation of the SRAM, while adding minimal area overhead. In the last few years, there has been extensive research in this area to help overcome the SRAM stability challenges. In this chapter, we start by defining the various metrics used to analyze write and read stability. These metrics are critical in the evaluation of SRAM stability and the effectiveness of circuit assists. Next, we present a detailed overview of the state-of-the art assist techniques and their impact on conventional SRAM design approaches. As a case study, we discuss the implementation details of a new technique. The technique selectively precharges different segments of the bitlines to \(V_\mathrm{DD}\) or \(GND\). Using charge sharing, the required value of bitline voltage can be precisely set to increase the bitcell read stability. A 512 kb memory was designed to demonstrate this technique in an industrial 45 nm technology. The technique significantly improves read stability, and provides high robustness against process variations.

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Notes

  1. 1.

    \(WL\) boosting is one of the techniques that will be described in the next sections.

  2. 2.

    The DC failure rate is 500X higher than the rate compared to dynamic failure rate for the 64 cells per bitline case. Also, DC failure is 140 mV higher than dynamic failure, which shows the importance of dynamic read stability.

  3. 3.

    \(\Delta V_\mathrm{BL}\) in this chapter should not be confused with the bitline differential voltage \(\Delta V_\mathrm{bl}\). Here, \(\Delta V_\mathrm{BL}\) is the reduction in bitline precharge level before accessing the bitcell.

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  1. Qualcomm Incorporated, 5775 Morehouse Drive, San Diego, 92131, USA

    Mohamed H. Abu-Rahma

  2. The American University in Cairo, Electronics Engineering Department, School of Sciences and Engineering, AUC Avenue, New Cairo, 11835, Egypt

    Mohab Anis

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Abu-Rahma, M.H., Anis, M. (2013). Variation-Tolerant SRAM Write and Read Assist Techniques. In: Nanometer Variation-Tolerant SRAM. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-1749-1_3

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