Abstract
A different DFT method than the scan of the previous chapter is boundary scan that primarily targets the boundary of a CUT, instead of the scan whose focus is on the inside of chip or a core. Boundary scan that has become an IEEE standard (IEEE std.1149.1) does not interfere in the design of a core, and its main purpose is to isolate the core being tested from other devices on a board or chip. This chapter discusses architecture, application, and operation of this IEEE standard. We use BS-1149.1 to refer to this standard.
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References
Bushnell ML, Agrawal VD (2000) Essintioals of electronic testing for digital, memory & mixed-signal VLSI circuits. Kluwer, Boston
IEEE Standard Test Access Port and Boundary Scan Architecture (1990) IEEE standard Board, 345 East 74th St. New York
Parker KP (2000) The boundary-scan handbook, 2nd edn. Kluwer, Boston
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© 2011 Springer Science+Business Media, LLC
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Navabi, Z. (2011). Standard IEEE Test Access Methods. In: Digital System Test and Testable Design. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-7548-5_8
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DOI: https://doi.org/10.1007/978-1-4419-7548-5_8
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