Abstract
The design productivity gap has been recognized as one of the major threats to the continued growth of embedded systems design productivity. Ad-hoc system-level design methodologies, that lift modeling to higher levels of abstraction, and the concept of intellectual property (IP), that promotes reuse of existing components, are essential steps to manage design complexity. However, the issue of compositional correctness arises with these steps. Given components from different manufacturers, designed with heterogeneous models, at different levels of abstraction, assembling them in a correct-by-construction manner is a difficult challenge. We address it by proposing a process algebraic model to support system design with a formal model of computation that serves as a behavioral type system to capture the behavior of system components at the interface level. The proposed algebra is conceptually minimal, equipped with a formal semantics defined in a synchronous model of computation, and supports a scalable notion and a flexible degree of abstraction. We demonstrate its benefits by considering the type-based synthesis of latency-insensitive protocols. We show that the synthesis of component wrappers can be optimized by the behavioral information carried by interface type descriptions and yield minimized stalls and maximized throughput.
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Talpin, JP., Guernic, P.L. (2004). Behavioral Type Inference. In: Gupta, R., Guernic, P.L., Shukla, S.K., Talpin, JP. (eds) Formal Methods and Models for System Design. Springer, Boston, MA. https://doi.org/10.1007/978-1-4020-8052-4_9
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DOI: https://doi.org/10.1007/978-1-4020-8052-4_9
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