Abstract
We develop within higher order logic (HOL) a general and flexible method of abstraction and refinement, which specifically addresses the problem of handling constraints. We provide a HOL interpretation of first-order Lax Logic, which can be seen as a modal extension of deliverables. This provides a new technique for automating reasoning about behavioural constraints by allowing constraints to be associated with, but formally separated from, an abstracted model. We demonstrate a number of uses, e.g. achieving a formal separation of the logical and timing aspects of hardware design, and systematically generating timing constraints for a simple sequential device from a formal proof of its abstract behaviour. The method and proofs have been implemented in Isabelle as a definitional extension of the HOL logic which extends work by Jacobs and Melham on encoding dependent types in HOL. We assume familiarity with HOL but not detailed knowledge of circuit design.
This work was partially supported by EPSRC under grant GR/L86180.
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Fairtlough, M., Mendler, M., Cheng, X. (2001). Abstraction and Refinement in Higher Order Logic. In: Boulton, R.J., Jackson, P.B. (eds) Theorem Proving in Higher Order Logics. TPHOLs 2001. Lecture Notes in Computer Science, vol 2152. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44755-5_15
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DOI: https://doi.org/10.1007/3-540-44755-5_15
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