Chapter

Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing

Volume 1896 of the series Lecture Notes in Computer Science pp 605-614

Date:

Stream Computations Organized for Reconfigurable Execution (SCORE)

Extended Abstract
  • Eylon CaspiAffiliated withUniversity of California at Berkeley
  • , Michael ChuAffiliated withUniversity of California at Berkeley
  • , Randy HuangAffiliated withUniversity of California at Berkeley
  • , Joseph YehAffiliated withUniversity of California at Berkeley
  • , John WawrzynekAffiliated withUniversity of California at Berkeley
  • , André DeHonAffiliated withDepartment of Computer Science, California Institute of Technology

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Abstract

A primary impediment to wide-spread exploitation of reconfigurable computing is the lack of a unifying computational model which allows application portability and longevity without sacrificing a substantial fraction of the raw capabilities. We introduce SCORE (Stream Computation Organized for Reconfigurable Execution), a stream-based compute model which virtualizes reconfigurable computing resources (compute, storage, and communication) by dividing a computation up into fixed-size “pages” and time-multiplexing the virtual pages on available physical hardware. Consequently, SCORE applications can scale up or down automatically to exploit a wide range of hardware sizes. We hypothesize that the SCORE model will ease development and deployment of reconfigurable applications and expand the range of applications which can benefit from reconfigurable execution. Further, we believe that a well engineered SCORE implementation can be efficient, wasting little of the capabilities of the raw hardware. In this abstract, we highlight the key components of the SCORE system.