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Analog Circuit Design pp 57–70Cite as

Scalability of Wire-Line Analog Front-Ends

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Abstract

Analog design in deep sub-micron technologies is a reality now and poses severe challenges to the circuit designer. Trends in technologies as well as their effects on circuit design are discussed. It is shown that, specifically for Wire-Line AFE’s, the power required for a certain dynamic range and bandwidth decreases with minimum feature size as long as a constant ratio between signal swing and supplyvoltage can be maintained. However, below 0.1μm channel-length, predictions of the threshold voltage endanger that requirement.

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Author information

Authors and Affiliations

  1. Broadcom Netherlands B.V., Bunnik, The Netherlands

    Klaas Bult

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  1. Klaas Bult
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Editors and Affiliations

  1. Delft University of Technology, Delft, Netherlands

    Johan H. Huijsing

  2. KU Leuven, Leuven, Belgium

    Michiel Steyaert

  3. Eindhoven University of Technology, Eindhoven, Netherlands

    Arthur van Roermund

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© 2003 Kluwer Academic Publishers

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Bult, K. (2003). Scalability of Wire-Line Analog Front-Ends. In: Huijsing, J.H., Steyaert, M., van Roermund, A. (eds) Analog Circuit Design. Springer, Boston, MA. https://doi.org/10.1007/0-306-47950-8_4

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  • DOI: https://doi.org/10.1007/0-306-47950-8_4

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-0-7923-7621-7

  • Online ISBN: 978-0-306-47950-2

  • eBook Packages: Springer Book Archive

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