Interfacing TF/ACC Applications to Verilog Simulators

Summary

This chapter has presented the major parts of PLI applications which are developed using the TF and ACC libraries. The main parts of an application are the name of a system task or system function, a checktf routine, a calltf routine, a sizetf routine, and a misctf routine, A system function called $pow, which calculates x^y and returns a 32-bit result, was used to illustrate the major parts of a PLI application. After defining the PLI application, the next step is to inform the simulator about the application. This is done through the PLI interface mechanism. The IEEE 1364 standard defines what the interface mechanism must specify, but the TF/ACC libraries do not define how the interface should be implemented. Most, but not all, Verilog simulators use a veriusertfs array to specify the interface information.

The remaining chapters in this part of the book examine the TF and ACC libraries in detail, and present a number of examples of using the routines in these libraries. Appendix A presents how PLI applications written using the TF and ACC libraries are linked into different Verilog simulators.