Regular Sessions Mixed Analysis Techniques

Tools and Algorithms for the Construction and Analysis of Systems

Volume 1384 of the series Lecture Notes in Computer Science pp 345-357


Static partial order reduction

  • R. KurshanAffiliated withBell Laboratories, Lucent Technologies
  • , V. LevinAffiliated withBell Laboratories, Lucent Technologies
  • , M. MineaAffiliated withDept. of Computer Science, Carnegie Mellon University
  • , D. PeledAffiliated withBell Laboratories, Lucent TechnologiesDept. of Computer Science, Carnegie Mellon University
  • , H. YenigünAffiliated withBell Laboratories, Lucent Technologies


The state space explosion problem is central to automatic verification algorithms. One of the successful techniques to abate this problem is called ‘partial order reduction’. It is based on the observation that in many cases the specification of concurrent programs does not depend on the order in which concurrently executed events are interleaved. In this paper we present a new version of partial order reduction that allows all of the reduction to be set up at the time of compiling the system description. Normally, partial order reduction requires developing specialized verification algorithms, which in the course of a state space search, select a subset of the possible transitions from each reached global state. In our approach, the set of atomic transitions obtained from the system description after our special compilation, already generates a smaller number of choices from each state. Thus, rather than conducting a modified search of the state space generated by the original state transition relation, our approach involves an ordinary search of the reachable state space generated by a modified state transition relation. Among the advantages of this technique over other versions of the reduction is that it can be directly implemented using existing verification tools, as it requires no change of the verification engine: the entire reduction mechanism is set up at compile time. One major application is the use of this reduction technique together with symbolic model checking and localization reduction, obtaining a combined reduction. We discuss an implementation and experimental results for SDL programs translated into Cospan notation by applying our reduction techniques. This is part of a hardware-software co-verification project.